HKN ECE 342 Review Session 2 Anthony Li Milan Shah
MOSFET’s • NMOS • PMOS
MOSFET Operating Point ●
MOSFET Incremental Model ●
Gain Calculation Av = -GMRout GM = Small signal transconductance, ratio of iout to vin ROUT = Equivalent incremental output resistance
Common Amplifier Topologies 1. 2. 3. 4. 5. Diode-tied Transistor Common Source/Drain/Gate Common Source with Degeneration Common Drain with Modulation Cascode 1. Diode Tied Transistor
Diode-Tied Transistor ● 1. Diode Tied Transistor
Common Source/Drain/Gate ● ● ●
Degeneration When a resistance is “viewed” through the drain, it appears bigger by a factor related to the transconductance. ●
Modulation Resistances seen through the source seem smaller: ●
Cascode
BJT
Regions of Operation ● ● Three regions of operation: Cutoff: VE > VB < VC Saturation: VE < VB > VC Forward Active: VE > VB > VC ○ ○ VT = kt/q IC = �IB IE = IC + IB �= gm. R��
BJT Small Signal Model
Terminal Impedance ● 1. Diode Tied Transistor
Common Emitter/Collector/Base
Degeneration When a resistance is “viewed” through the collector, it appears bigger by a factor related to the transconductance.
Modulation Resistances seen through the Emitter seem smaller.
Bode Plots Magnitude Pole: Roll down by 20 db/dec, 6 db/oct Zero: Roll up by 20 db/dec, 6 db/oct Phase: arctan(ω/ωp) Usually -90° for poles, +90° for zeros ωugf = 20 log|An| * ωpn where n is the pole located before unity gain frequency