Hardverski orijentisani kursevi na SI svrha formalna i

Hardverski orijentisani kursevi na SI svrha: • formalna i akademska: ETF master diploma MSc ECE • akademska i praktična: efikasnije pisanje SW • praktična: dizajn računara i procesora (? ? ? ) • praktična: dizajn embedded sistema (£ € $) Embedded sistemi • Embedded system je računarski sistem sa unapredefinisanom funkcijom unutar složenijeg elektromehaničkog sistema (suprotno računaru opšte namene) • Pored standardnih računarskih resursa postoji interakcija SW sa periferijama, senzorima i aktuatorima u sistemu ili objektu koji SW kontroliše

Koncepcija embedded sistema • Centralizovano merenje i kontrola – industrijski PC – PLC – … • Distribuirano merenje i kontrola – Mreža mikrokontrolera • A microcontroller (sometimes abbreviated µC, u. C or MCU) is a small computer on a single integrated circuit containing a processor core, memory, and PROGRAMMABLE input/output peripherals • Input/output peripherals: analog, digital, mix-signal

Microcontrollers (MCU) Market by Transparency Market Research www. transparencymarketresearch. com/microcontrollers-market. html According to a new market report published by Transparency Market Research “Microcontrollers (MCU) Market by Product (8 -bit, 16 -bit, 32 -bit) – Global Industry Analysis, Size, Share, Growth and Forecast, 2012 – 2018″, the demand for microcontrollers was 10. 64 billion units in 2011, and is expected to reach over 29 billion units in 2018, growing at a CAGR of 16. 0% from 2012 to 2018. In terms of revenue, the market was valued at USD 15. 7 billion in 2011, and is expected to reach USD 28. 49 billion in 2018, growing at a CAGR of 9. 0% from 2012 to 2018.

Part Number Cost Notes MSP 430 F 2101 TI $1. 17 Very powerful 16 bit microcontroller, with low cost development tools, Has an on board comparator which can be used to simulate an ADC, and a software UART. This is a great part! PIC 16 F 630 Microchip $1. 26 Decent processor and easy to use tools. 14 pin packages PIC 16 F 676 Microchip $1. 47 Similar to the PIC 16 F 630, but with ADCs. PIC 10 F 200 Microchip $0. 61 Very cheep, and very small with 8 pin SOIC and 6 pin SOT-23 packages. AT 89 C 2051 Atmel $1. 05 20 pin package. ATTiny 11 L Atmel $0. 35 8 pin package. Has low cost development tools.

Organizacija mikrokontrolera

Aplikacija mikrokontrolera

Hardware/software codesign - incorrect assumptions • Hardware and software can be acquired separately and independently, with successful and easy integration of the two later • Hardware problems can be fixed with simple software modifications • Once operational, software rarely needs modification or maintenance • Valid and complete software requirements are easy to state and implement in code

Abstract Hardware-Software Modeling Some kind of unified abstract system representation can be used for early performance analysis

Specification + Modeling High-level modeling: FSM State Charts Data Flow Petri Nets UML VHDL, Verilog Spec. C, System. Verilog

Classical automata - Finite state machines (FSM) • Provides a mathematical foundation for verifying system correctness, simulation, hardware/software partitioning, and synthesis • Specification and modeling of control dominated applications such as a real-time, reactive control systems FSM Transducers • Transducers generate output based on a given input and/or a state using actions • Moore machine: output depends only on the state. The advantage of the Moore model is a simplification of the behavior. • Mealy machine: output depends on input and state. The use of a Mealy FSM leads often to a reduction of the number of states.

Šema za obradu binarnih signala // definicije i deklaracije #define Ulaz P 3_1 #define Izlaz 1 P 3_2 #define Izlaz 2 P 3_3 bdata char Sh. Reg; // bit adresib. bajt sbit Q 4=Sh. Reg^7; sbit Q 3=Sh. Reg^6; sbit Q 2=Sh. Reg^5; sbit Q 1=Sh. Reg^4; sbit Q 0=Sh. Reg^3; bit Bit. A , Tmp; // deo C programa koji realizuje // jedan korak pomeranja Tmp=(Bit. A|Q 3)&(Ulaz|Q 0); Sh. Reg >>=1;

Coke Machine Version 1. 0 When turned on, the machine waits for money • When a quarter is deposited, the machine waits for another quarter • When a second quarter is deposited, the machine waits for a selection • When the user presses “COKE, ” “SPRITE” or “DIET COKE, ” an appropriate item is dispensed • When the user takes the bottle, the machine waits again Bottles can get stuck in the machine • An automatic indicator will notify the system when a bottle is stuck • When this occurs, the machine will not accept any money or issue any bottles until the bottle is cleared • When the bottle is cleared, the machine will wait for money again

• UML Statechart – Developed by Object Management Group (OMG). – Extend the properties of Harel’s statecharts with some new features.

Hardverski orijentisani kursevi na SI • I godina – OE 1 – ORT 1 • III godina • SI 3 AR 1 • SI 3 AR 2 • II godina – ORT 2 – ODE – SI 2 AR • • • IV godina SI 4 MS SI 4 VLS SI 4 MPS Si 4 PAR

Deo diskusije sa IT formuma “Potreban je samo jedan covek koji zna da osmisli i dokumentuje system do tancina, a posle 50 programera razvija software na osnovu specifikacija ovog arhitekte. Tako da je to sasvim normalno, a i nije nista IT specificno. Isto je i u masinstvu, npr u BMW-u - Chief Designer ima mnogo vecu platu od Fied Designera…”

Formiranje ocene • 3 x 20 bodova po kolokvijumu • 3 domaća zadatka ukupno 20 bodova • 2 x 10 bodova po projektu Ukupno 100 bodova • • Integralni ispit, max 80 bodova Domaći zadaci nisu nadoknadivi Kolokvijumi i projekti jesu nadoknadivi Lab vežbe obavezne, ne nose bodove

Sadržaj kursa • Dinamičke karakteristike prekidačkih elemenata i LK • Električne i eksploatacione karakteristike KM i SM. Disipacija, faktor grananja, kašnjenje, margine šuma. SW interakcija i kompenzacija karakteristika. • Relaksacioni oscilatori i analogni tajmeri. Havrijski i WD tajmer. Pouzdanost embedded SW • Linearne vremenske baze • Memorije, CPLD i FPGA • SW: upravljanje displejima i tastaturom • Programabilni tajmeri i brojači. Sinhronizacija asinhronih signala na sinhrone sekvencijalne mreže. SW: akvizicija i generisanje frekvencije i perioda. • Kvantizacija. AD i DA konverzija. Analogni front-end, diferencijalni i jednostruki. Naponske reference. Optokapleri, PWM i galvansko razdvajanje. Optički enkoderi, merenje brzine i ugla. • SW: Generisanje i akvizicija kontinualnih signala • SW: integracija sistema

• Poluprovodničke komponente u prekidačkom režimu rada. (Kako tranzistori pune i prazne parazitne kapacitivnosti. . . ) • Statičke i dinamičke karakteristike idealnih i realnih logičkih kola. (Kako izlazni stepeni logičkih kola pune i prazne parazitne kapacitivnosti, kako to utiče na rad kola. . .

• Realizacija logičkih kola sa tranzistorima. CMOS, ECL, TTL, Bi. CMOS, logička kola. • Analiza statičkih i dinamičkih karakteristika realnih logičkih kola sa stanovišta korisnika. • Komparatori i Šmitovo kolo.

XOR

Pojava lažnih stanja

• Bistabilna, monostabilna kola, rlaksacioni ocilatori. • Astabilni generatori linearnih vremenskih baza. • Primena za generisanje taktnih signala, time-out logiku, watch-dog tajmer, • mikroprocesorska supervizorska kola.

• A/D D/A konvertori I prateće komponente • Realizacija konvertora. • Povezivanje na procesorsku magistralu.