Generating Rectify Assembly code examples Part 1 of

Generating “Rectify( )” Assembly code examples Part 1 of 3 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada

Concepts n Concepts of C++ “stubs” n Forcing the test to fail – test of test n Generating valid “C++ code” to satisfy the tests n Need for “name mangling” for overloaded functions n How do you find out the name mangled name so it can be used in assembly code n Learning just enough Tiger. SHARC assembly code to make things “work” 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 2

Software “AM” radio concept RF STAGE Antenna Pickup AUDIO STAGE Mixer Low pass Filter Rectifier Low pass Filter + amplifier Local Oscillator IF STAGE Audio out Most stages handled with high speed software 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 3

Test Driven Development Work with customer to check that the tests properly express what the customer wants done. Iterative process with customer “heavily involved” – “Agile” methodology. CUSTOMER DEVELOPER 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 4

E-TDD Test. cpp files have four main components. Many error messages if not present Include Files – cut-and-paste (always the same) TEST_CONNECT (Test. File. Info) TEST(test. NAME, test. TYPE) NOTE: Tests execute from LAST in file to FIRST. As normally the LAST test is the most recently added test, this is good. You test if new code works and then check (regression test) that you did not break anything 12/28/2021 5 LINK_TEST(Test. File. Info, test. TYPE) Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada

Now expand the Customer Tests to do what the customer has requested Problems to be fixed in Assignment 1 Add test for If N <= 0, return NULL otherwise return the start of the output array Tests are working by mistake as We are not resetting the output array to 0 between function calls 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 6

Name mangled names can be seen from linker C++ name as used in C++ code 12/28/2021 The name mangled name generated by by the C++ compiler in response to function overloading. These are the “assembly code” names Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 7

Next step: Write just enough code to satisfy the linker – C++ stubs 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 8

Write the assembly language stub n We lost control of the processors in the debug environment. 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 9

Build the code incrementally to satisfy tests See speed change now we Are executing code – but why failures Note what if N < = 0 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 10

Note Special marker Compiler optimization FLOATS 927 304 -- THREE FOLD INTS 960 150 – SIX FOLD Why the difference, and can we do better, and do we want to? 12/28/2021 Note the failures – what are they Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 11

Fix Tests to only show “FAILURES 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 12

Generate assembly code n Do the code in steps, attempting to satisfy one test at a time n Learn “the assembler” in steps n Get “some idea” of the issues we need to learn about as we go along n Just enough knowledge “to get things to work” n Worry about full details later 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 13

What we need to know based on experiences from other processors n Can we return from an assembly language routine without crashing the processor? n Return a parameter from assembly language routine n (Is it same for ints and floats? ) n Pass parameters into assembly language n (Is it same for ints and floats? ) n Do IF THEN ELSE statements n Read and write values to memory n Read and write values in a loop n Do some mathematics on the values fetched from memory All this stuff is demonstrated by coding Half. Wave. Rectify. ASM( ) 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 14

Write tests about passing values back from an assembly code routine 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 15

What we have learned n We passed the “very general” test Managed to call and return from an assembly code and did not crash the system n We passed some specific tests in the test file “by accident” n n CJMP – is the “way to return” from an assembly code function to “C++” n Instruction format is interesting nop; ; CJMP (ABS); ; ; separate instructions executed together ; ; indicates the end of an “grouped” instruction CJMP must be like RTS – meaning there is a CJMP register (or memory location) storing the address to return to after this COMPARE TO Blackfin P 0 = [FP + 4]; Place storing return address UNLINK; JUMP (P 0); 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 16

More detailed look at the code As with 68 K and Blackfin needs a. section But name and format different As with 68 K need. align statement Is the “ 4” in bytes (8 bits) or words (32 bits) As with 68 K need. global to tell other code that this function exists Single semi-colons Double semi-colons Start function label End function label Used for “profiling code” 12/28/2021 Label format similar to 68 K Needs leading underscore and final colon Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 17

Need to know n How do we return “an integer pointer” n Need to look at “C++” manual for coding conventions n As with 68 K, MIPS and Blackfin expect to have Volatile registers – function variate registers, that DON’T need to be conserved when developing a function n Non-volatile, preserved registers – function invariate registers, that DO need to be conserved when developing a function n 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 18

Return registers n There are many, depending on what you need to return n Here we need to use J 8 n Many registers available – need ability to control usage n J 0 to J 31 – registers (integers and pointers) (SISD mode) n XR 0 to XR 31 – registers (integers) (SISD mode) n XFR 0 to XFR 31 – registers (floats) (SISD mode) n Did I also mention n I 0 to I 31 – registers (integers and pointers) (SISD mode) n YR 0 to YR 31 , YFR 0 to YFR 31 (SIMD mode) n XYR, YXR and R registers (SIMD mode) n And also the MIMD modes n And the double registers and the quad registers ……. #define return_pt_J 8 12/28/2021 // J 8 is a VOLATILE, NON-PRESERVED register Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 19

Using J 8 for returned int * value Now passing this test “by accident Tiger. SHARC assemble code 1, 12/28/2021 Should be conditionally passing back NULL M. Smith, ECE, University of Calgary, Canada 20

Conditional tests Need to code – returning a NULL or the starting address of the final array int *Half. Wave. Rectify. Release(int initial_array[ ], int final_array[ ], int N) if ( N < 1) return_pt = NULL; else /* after some calculations */ return_pt = &final[ 0]; Questions to ask the instruction manual n How are parameters passed to us? n On the stack (as with 68 K) or in registers / stack (as with MIPS and Blackfin)? – answer turns out to be more like MIPS and Blackfin n How do you do an IF? n How do you do conditional jumps? 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 21

Parameter passing n Spaces for first four parameters ARE ALWAYS present on the stack (as with 68 K) n But the first four parameters are passed in registers (J 4, J 5, J 6 and J 7 most of the time) (as with MIPS) n The parameters passed in registers are often then stored into the spaces on the stack (like the MIPS) for “safe keeping” when assembly code functions call assembly code functions n J 4, J 5, J 6 and J 7 are volatile, non-preserved registers 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 22

Coding convention // int *Half. Wave. Rectify. Release(int initial_array[ ], // int final_array[ ], int N) #define initial_pt_inpar 1 J 4 incoming parameters #define final_pt_inpar 2 J 5 #define N_J 6_inpar 3 J 6 #define return_pt_J 8 12/28/2021 J 8 return value Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 23

Can we pass back the start of the final array Still passing tests by accident and the start of the array needs to be conditional return value 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 24

What we need to know based on experiences from other processors n Can we return from an assembly language routine without crashing the processor? n Return a parameter from assembly language routine n (Is it same for ints and floats? ) n Pass parameters into assembly language n (Is it same for ints and floats? ) n Do IF THEN ELSE statements n Read and write values to memory n Read and write values in a loop n Do some mathematics on the values fetched from memory All this stuff is demonstrated by coding Half. Wave. Rectify. ASM( ) 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 25

Doing an IF (N < 1) JUMP type of instruction n 68 K version CMP. L #1, D 1 BLT ELSE ; Performs subtraction (D 1 – 1) and sets ; condition code flag ; Branch if result of (D 1 – 1) < 0 ; BLE is a branch if less than ; zero instruction NOT on whether D 1 < 1 n Tiger. SHARC version COMP(N_inpar 3, 1); ; // Perform N < 1 test IF JLT, JUMP ELSE; ; // NOTE: Use of comma , and semi-colons ; ; n Same possible error on BOTH processors n 68 K -- which test BLE, BLT or BGT should be used? n Tiger. SHARC – which test JLE, JLT or NJLE should be used? 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 26

ELSE is a Tiger. SHARC keyword Should have guessed as editor turned in blue ELSE is a KEYWORD Fix that error first 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 27

Why is ELSE a keyword FOUR PART ELSE INSTRUCTION IS LEGAL IF JLT; ELSE, J 1 = J 2 + J 3; // Conditional execution – if true ELSE, XR 1 = XR 2 + XR 3; // Conditional – if true YFR 1 = YFR 2 + YFR 3; ; // Unconditional -- always IF JLT; DO, J 1 = J 2 + J 3; // Conditional execution -- if true DO, XR 1 = XR 2 + XR 3; // Conditional -- if true YFR 1 = YFR 2 + YFR 3; ; // Unconditional -- always Having this sort of format means that the instruction pipeline is not disrupted by jumps when we do IF statements 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 28

Fix ELSE keyword error GREATER a keyword? Not blue Just change it to something else rather than wasting time 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 29

Label name is not the problem NOTE: This is “C-like” syntax, But it is not “C” Statement must end in ; ; Not ; 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 30

Should learn to read – looking at wrong error. Click on error line Missing ; ; 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 31

Still not got the correct syntax Because of missing ; ; (dual semicolons) Processor thinks we want return_pt = 0; JUMP END_IF; return_pt = INPAR 3 ; ; Apparently such a complicated instruction IS LEGAL provided the jump is at the start of the multiple issue instruction 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 32

Add dual-semicolons everywhere Worry about “multiple issues” later This dual semi-colon Is so important that you MUST code review for it all the time or else you waste so much time in the Lab. Key in exams / quizzes 12/28/2021 At last an error I know how to fix Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 33

Well I thought I understood it !!! n Speed issue – JUMPS can’t be too close together. n Not normally a problem when “if” is larger 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 34

Add a single instruction of 4 NOPs nop; ; n Fix the last error as part of Assignment 1 Fix the remaining error in handling the IF THEN ELSE as part of assignment 1 Worry about code efficiency later (refactor) when all code working 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 35

What we need to know based on experiences from other processors n Can we return from an assembly language routine without crashing the processor? n Return a parameter from assembly language routine n (Is it same for ints and floats? ) n Pass parameters into assembly language n (Is it same for ints and floats? ) n Do IF THEN ELSE statements n Read and write values to memory n Read and write values in a loop n Do some mathematics on the values fetched from memory All this stuff is demonstrated by coding Half. Wave. Rectify. ASM( ) 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 36

Assignment 1 – code the following as a software loop – follow 68 K approach extern “C” int Calculate. Sum(void) { int sum = 0; for (int count = 0; count < 6; count++) { sum = sum + count; } return sum; } extern “C” – means that this function is “C” compatible rather than “C++”. n 12/28/2021 No overloading (requiring name-mangling) permitted Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 37

Reminder – software for-loop becomes “while loop” with initial test extern “C” int Calculate. Sum(void) { int sum = 0; int count = 0; while (count < 6) { sum = sum + count; count++; } return sum; } Do line by line translation 12/28/2021 Tiger. SHARC assemble code 1, M. Smith, ECE, University of Calgary, Canada 38