Gen 2 DOM Readout Communication Protocol KarlHeinz Sulanke

Gen 2 DOM Readout Communication Protocol Karl-Heinz Sulanke DESY Zeuthen 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 1

Introduction • revisiting the gen 1 DOM comm. protocol • next steps 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 2

DOM Readout Gen 2, Comm. Requirements • Communication to 4 x Gen 2 DOMs / wire pair • Data rate / DOM > 250 Kbit/s • packets with 32 bit checksum • TCAL with low dead time • High reliability 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 3

DOM Readout Gen 1 Communication • Communication to 2 DOMs / wire pair • master / slave principle, the DOR is master, fetching the DOM data • software „only“ has to write to / read from comm. buffers • firmware does the rest • sending / receiving packets of bytes, framed by the control bytes E 3 and 99 • control packets (e. g. „Data Read Request“) and data packets • UART like byte encoding: 1_Start 8_Data 1_Stop bit 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 4

Data Packet Format Data Buffer of DOM_A 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 5

Packet Type type meaning by sw 000 data packet in the beginning/middle of a sequence x 001 acknowledgement of a data packet x 010 data packet, at the end of a sequence x 011 control packet x 100 initiate connection x 101 connection initiated x 110 DOR control message 111 undefined by fw x rem. : definition by Arthur Jones, check DOR_API_3 x. pdf for details 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 6

DOR Control Messages rem. : initiated by DOR firmware in blue, by DOR software in red, by DOM software in green bit 15. . 14 of the sequence number field are being used to control the comm. signal strength bit 15 signal_up_request bit 14 signal_down_request 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 7

TCAL Packet DOR Tx Time Stamp DOR Rx waveform DOM Tx Time Stamp DOM Rx waveform rem. : fixed packet length and structure, reception after software initialization 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 8

ASK Encoding, 1 MBit/s Tx control message 10 bytes (100 us) 3/11/2021 K. -H. Sulanke, DESY Zeuthen Rx 3500 m cable Ice. Cube meeting, Stockholm 2018 -09 9

8 B 10 B Encoding, 2 MBit/s Tx Rx, 3500 m Kabel 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 10

TCAL Cycle, Signal measured at DOR side DOR - TCAL command DOR - TCAL pulse DOM – TCAL pulse DOM TCAL data 1. 4 ms 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 11

Rx / Tx Data Path, one Wire Pair PCI Bus FPGA Comm. DAC 8 Framing, Encoding Tx_FIFO_A, B 8 Cable Con. Data_out Data_in Empty Read. Ena Alm. Empty Write. Ena 32 Address Decoder 2 Wire Pair Control (8) State Machines 2 Bus. Cycle 4 Message_rcvd Interrupt Control Diff. Rec. Comm. ADC 10 Decoding, De. Frame Rx_FIFO_A, B 8 Data_in Data_out Alm. Full Write. Ena Empty Read. Ena Interrupt 1 Internal FIFOs will be replaced by external SRAM 3/11/2021 K. -H. Sulanke Ice. Cube meeting, Stockholm 2018 -09 12

Firmware, State Machines • Statemachines to control the half duplex communication for 2 DOMs 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 13

Next Steps • adapting the existing comm. firmware to the new hardware – needed for gen 1 hardware compatibility anyway – converting AHDL code to VHDL • communication tests, original Ice. Cube cable + CDC 1 card (? ) – trying the VGA (variable gain amplifeir) receiver – trying the transformer only (no receiver) configuration • investigating 8 b 10 b encoding more thoroughly • implementing firmware initiated retransmit • trying other encodings (e. g. QAM) • . . . 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 14

Thanks ! 3/11/2021 K. -H. Sulanke, DESY Zeuthen Ice. Cube meeting, Stockholm 2018 -09 15