FPGAed TDC FPGAed TDC University of Sci Tech

汇报内容 FPGAed TDC的研究进展 FPGAed TDC的应用 人才培养情况 论文与专利 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

汇报内容 FPGAed TDC的研究进展 FPGAed TDC的应用 人才培养情况 论文与专利 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

方法探索：快速胖树形编码 • Wave Union结构的延迟链TDC，连续多次测量，需要在 单周期内完成超宽位的非温度码到二进制码的快速编码。 Ø 2002，美国宾州州立大学D. Lee等 人在ASIC设计中提出了胖树形的编 码电路(Fat Tree Encoder)。 Ø改进其方法，在FPGA中成功实现。 “A fast improved fat tree encoder for wave union TDC in an FPGA”, Chinese Physics C, Vol. 37, No. 10, Oct. 2013, pp. 106102 -1 - 106102 -7. “A Stepped-Up Tree Encoder for the 10 -ps Wave Union TDC”, IEEE Transactions on Nuclear Science, Vol. 60, No. 5, Oct. 2013, pp. 3544 -3549. 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

NIM标准的TDC插件 Ø Ø Ø Ø ~50 ps RMS, 100 ps Bin Size USB� 出 16 Channels, ~170 ms Dynamic range single-ended input, Range from -5 V~5 V, with on-board fast discriminator 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

FPGAed TDC的研究进展 FPGAed TDC的应用 人才培养情况 论文与专利 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

FPGAed TDC的研究进展 FPGAed TDC的应用 人才培养情况 论文与专利 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

FPGAed TDC的研究进展 FPGAed TDC的应用 人才培养情况 论文与专利 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

已发表论文 1. Jinhong Wang, Shubin Liu, Qi Shen, Hao Li, Qi An, “A Fully Fledged TDC Implemented in Field-Programmable-Gate-Arrays”, IEEE Trans. On Nuclear Science, Vol. 57, No. 2, P 446 -450, Part 1，APR 2010. 2. Chen Kai, Liu Shunbin, An Qi, A High Precision Time-to-Digital Converter Based on Multi-Phase Clock Implemented Within Field-Programmable-Gate. Array, Nuclear Science and techniques, Vol. 21 No. 2, Apr. 2010, p 123 -128 3. Jinhong Wang, Shubin Liu, Lei Zhao, Xueye Hu, Qi An, “The 10 -ps Multitime Measurements Averaging TDC Implemented in an FPGA”, IEEE Transactions on Nuclear Science, Vol. 58, No. 4, August, 2011, pp. 2011 -2018. 4. Lei Zhao, Xueye Hu, Shubin Liu, Jinhong Wang, Qi Shen, Huanhuan Fan, Qi An, “The Design of a 16 -Channel 15 ps TDC Implemented in a 65 nm FPGA”, IEEE Transactions on Nuclear Science, Vol. 60, No. 5, Oct. 2013, pp. 3532 -3536. 5. Xueye Hu, Lei Zhao, Shubin Liu, Jinhong Wang, Qi An, “A Stepped-Up Tree Encoder for the 10 -ps Wave Union TDC”, IEEE Transactions on Nuclear Science, Vol. 60, No. 5, Oct. 2013, pp. 3544 -3549. 6. Chunfeng Ye, Lei Zhao, Zhongyue Zhou, Shubin Liu, Qi An, “A fieldprogrammable-gate-array based time digitizer for the Time-of-Flight Mass Spectrometer”, Review of Scientific Instruments, Vol. 85, Apr. 2014, pp. 045115 -1 – 045115 -7. 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

发表论文 7. Qi Shen, Lei Zhao, Shubin Liu, Shengkai Liao, Binxiang Qi, Xueye Hu, Chengzhi Peng, Qi An, “A fast improved fat tree encoder for wave union TDC in an FPGA”, Chinese Physics C, Vol. 37, No. 10, Oct. 2013, pp. 106102 -1 - 106102 -7. 8. Xi Qin, Changqing Feng, Deliang Zhang, Bin Miao, Lei Zhao, Xinjun Hao, Shubin Liu, Qi An, “Development of a High Resolution TDC for Implementation in Flash-Based and Anti-Fuse FPGAs for Aerospace Application”, IEEE Transactions on Nuclear Science, Vol. 60, No. 5, Oct. 2013, pp. 3550 -3556. 9. Xi Qin, Changqing Feng, Deliang Zhang, Lei Zhao, Shubin Liu, Qi An, “Multitime averaging TDCs implemented in an Actel flash-based FPGA”, Applied Mechanics and Materials, Vols. 336 -338, Apr. 2013, pp. 9 -18. 10. Xi Qin, Changqing Feng, Deliang Zhang, Lei Zhao, Shubin Liu, Qi An, “A low dead time vernier delay line TDC implemented in an actel flash-based FPGA”, Nuclear Science and Techniques, Vol. 24, No. 4, Aug. 2013, pp. 040403 -1 – 404003 -7. 11. Q, Shen, S. Liao, S. Liu, J. Wang, W. Liu, C. Peng, and Q. An, “An FPGABased TDC for Free Space Quantum Key Distribution”, IEEE Transactions on Nuclear Science, Vol. 60, No. 5, OCT. 2013 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

发表论文 12. Qi Shen, Shengkai Liao, Shubin Liu, Jinhong Wang, Weiyue Liu, Chengzhi Peng, Qi An, “Time Interval Analyzer with FPGA-Based TDC for Free Space Quantum Key Distribution: Principle and Validation with Prototype Setup”, presented in 18 th IEEE Real Time Conference, June 2012, Berkeley, USA. 13. T. Xiang, L. Zhao*, X. Jin, T. Wang, S. Chu, C. Ma, S. Liu, Q. An, “A 56 -Ps Multi-Phase Clock Time-to-Digital Convertor Based on Artix-7 FPGA”, presented in 19 th IEEE Real Time Conference, May 2014, Nara, Japan. 14. Tian XIANG, Lei ZHAO, Xi JIN, Tianqi WANG, Shaoping CHU, Cong Ma, Shubin LIU, Qi. AN, Xue BEN, ”A Multi-phase Clock Time-to-Digital Convertor based on ISERDES Architecture”, 2014 IEEE 22 nd Annual International Symposium on Field-Programmable Custom Computing Machines 15. Qi Shen, Shubin Liu, Binxiang Qi, Qi An, Shengkai Liao, Chengzhi Peng, Weiyue Liu, ” A Multichain Measurements Averaging TDC Implemented in a 40 nm FPGA”, presented in 19 th IEEE Real Time Conference, May 2014, Nara, Japan. 16. Xi Qin, Changqing Feng, Lei Zhao, Deliang Zhang, Xinjun Hao, Shubin Liu, Qi An, “Development of High Resolution TDC Implemented in Radiation Tolerant FPGAs for Aerospace Application”, presented in 18 th IEEE Real Time Conference, June 2012, Berkeley, USA. 中国科学技术大学 University of Sci. & Tech. of China 快电子学实验室 Fast Electronics Lab

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