FPGA Computing Machines Use FPGA Technology to build

FPGA Computing Machines • Use FPGA Technology to build a compute engine for special purpose applications • Goals/Promises ÞReconfigurability : architecture can be reconfigured for different applications ®Dynamic Reconfiguration Need SRAM-based FPGAs for reconfigurability (Xilinx X 4000 series, Altera Flex 10 K ÞAdapatable : means that during execution of the application, architecture changes to optimize use of hardware resources or to adapt to changing conditions. • Many different architectures have been built 2/13/2022

Some Common Features of FPGA CMs. • Usually FPGAs + Memory ÞMemory connected to individual FPGAs or to FPGA array via a crossbar ÞUsually SRAM memory for simplicity • FPGA CM usually connected to a host machine that is responsible for downloading configuration, performing IO ÞCommon arrangement is Workstation host connected via a bus (PCI, SBUS, etc) to the FPGA CM 2/13/2022

SRAM FPGAs • Xilinx X 4000 Family, New Virtex Family ÞVirtex Family has up to 27, 648 CLBs (1 M gates) ÞHas both distributed SRAM memory in LUTs and blocks of RAM (4 K blocks configurable to different data widths) ÞFour onboard DLL (Delay Locked Loop) clocks, with clock doublers Þhttp: //www. xilinx. com/prs_rls/vtxbackg. htm • Altera FLEX 10 K ÞLUTs + SRAM (up to 250, 000 gates) Þhttp: //www. altera. com/html/products/f 10 k. html 2/13/2022

An example FGPA CM - Transmogrifier-2 • www. ecg. toronto. edu/~jayar/research/tm 2. html Uses Altera Flex 10 K 100 FPGAs (each FPGA = 100 K gates). Uses Crossbar switches and has 10 Mbytes of RAM Logical Network looks like a binary tree - 32 FPGAs max Physical implementation is 16 boards connected by a backplane (each board contains 2 FPGA + SRAM and crossbar switches) Tested applications to date have been video applications 2/13/2022

Bus Crossbar (www. icube. com) • Have both bus and bit switched devices • Bus crossbar can switch in IOs in 4 -bit nibbles, and can be combined to switch 8, 16 and 32 bit busses • Switching is SRAM based which means that external interface looks like a memory interface ÞWriting a memory location changes switches 2/13/2022

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Programming Crossbar • To switch a nibble, two switches must be programmed (1 level one, 1 level two) • To switch an 8 bit bus, 4 level two switches must be programmed ÞLevel one switches must be programmed as well but this is assumed to be static and done at initialization time Þ 4 level two switches needed for 16 -bit bus switching, 16 level two switches for 32 -bit bus switching • Two SRAM banks for holding two different switch configurations are present ÞCan change between two different configurations in one operation. 2/13/2022

Digital Equipment Corporation - Pamette One FPGA for PCI interface, 4 FPGAs for programming. Board has both SRAM and DRAM. 2/13/2022

SPLASH, SPLASH 2 • One of the first FPGA computing machines • Built by Maryland Supercomputing Research Center • SPLASH 2 used 16 Xilinx 4010 devices ÞFPGAs connected in Linear Array augmented by a crossbar ÞEach FPGA had external SRAM • Most applications concentrated on stream processing applications (maps well to linear array) ÞString matching (DNA pattern matching) ÞGenetic Algorithms ÞDSP algorithms ÞNeural Network applications 2/13/2022

SPLASH 2 Application • Genetic Algorithm for traveling salesman problem ÞFour FPGA solution was 5 X faster than workstation solution even though workstation had an 11 X faster clock (implies that FPGA solution could be 50 X faster). • Genetic Algorithm operations (Probabilistic Search) ÞSelection (select a pairs of individual to progagate to next population ÞCrossover (take charactistics from both parents to produce new solutions) ÞMutation (new solutions generated by random peterbations) ÞFitness (calculate fitness of new solutions) ÞStatistics (determine best solution found to date in new population). 2/13/2022