First Experiences with Synchronicity Overview Experiences so far

First Experiences with Synchronicity • Overview • Experiences so far • Preliminary conclusions Ian Brawn. 1. 7. 4.

Sychronicity • Project. Sync – project management – bug report distribution – emails on archive updates, etc. • Design. Sync – builds & maintains archive — ‘vault’ – multiple user access • Available through Europractice – Developer Suite (1 -10 users): 480 Euro (+ 1015 Euro maintenance) – Client only (site): 50 Euro (+ 50 Euro maintenance) • http: //www. msc. rl. ac. uk/europractice/univs/synchronicity. html

Design. Sync • Installed by Richard Lawrence • So far tested ‘vault’ access & HDL Designer interface • Guinea pig = copy of Serialiser firmware design – 52 components – 285 files — graphic source & VHDL – 6 Mbytes – (cf CMM-CP library = 511 files, 12 MBytes)

Preliminary Results & Impressions • Some teething troubles, now solved – caused by unconventional library names?

Preliminary Results & Impressions • Some teething troubles, now solved – caused by unconventional library names? • Accessing vault using Design. Sync: – easy GUI – operates on windows file structure – complete design check in/out =15 seconds

Preliminary Results & Impressions • Some teething troubles, now solved – caused by unconventional library names? • Accessing vault using Design. Sync: – easy GUI – operates on windows file structure – complete design check in/out =15 seconds • Accessing vault using HDL Designer: – easy GUI – operates on VHDL design heirarchy

Preliminary Results & Impressions • Some teething troubles, now solved – caused by unconventional library names? • Accessing vault using Design. Sync: – easy GUI – operates on windows file structure – complete design check in/out =15 seconds • Accessing vault using HDL Designer: – easy GUI – operates on VHDL design heirarchy – complete design check in = 7 minutes

Preliminary Results & Impressions • Some teething troubles, now solved – caused by unconventional library names? • Accessing vault using Design. Sync: – easy GUI – operates on windows file structure – complete design check in/out =15 seconds • Accessing vault using HDL Designer: – easy GUI – operates on VHDL design heirarchy – complete design check in = 7 minutes –. . . out = 24 minutes

Preliminary Results & Impressions • Some teething troubles, now solved – caused by unconventional library names? • Accessing vault using Design. Sync: – easy GUI – operates on windows file structure – complete design check in/out =15 seconds • Accessing vault using HDL Designer: – easy GUI – operates on VHDL design heirarchy – complete design check in = 7 minutes –. . . out = 24 minutes • Easy to confuse both interfaces by checking designs in using Design. Sync & out using HDL Designer, or visa versa. However. . . Easy to recover using Design. Sync. •

Conlcusions So Far • HDL Designer interface to vault is of little value, at least for a single user. Next Steps • • • Try harder to breaks system & replicate teething troubles Try sharing between 2 users Try including non-ascii files in vault Investigate Project. Sync Use Design. Sync to manage 9 U ROD design 5 licenses ordered: Ian Brawn, James Edwards, Adam Davis , Weiming Qian, Dave Sankey