FIR filters ELG 6163 Miodrag Bolic Outline FIR
FIR filters ELG 6163 Miodrag Bolic
Outline • FIR filters – Structures – Polyphase FIR filters – Parallel polyphase FIR – Decimated FIR • Implementations of FIR filters
Sequential application specific processor • A processor tuned only for a particular application • Can be used for low-power implementations • Word lengths can be adjusted to the current problem. • Example: FIR filter
Direct form FIR filter Copied from [Wanhammer 99]
Transposed FIR Copied from [Wanhammer 99]
Assignment • Design an N-tap transposed linear-phase FIR filter as a sequential application specific processor. Use only one multiplier and show processing time can be decreased twice. Hint: design a transposed FIR filter structure as in the previous slide but allow for generating the sums in reversed order PSN-1, PSN-2, …, PS 1, y(n). Copied from [Wanhammer 99]
General purpose processor architecture • FIR example • We will study RISC architectures • Single-cycle processor – Implementation of add and load instructions • Pipelined implementation – Why do all instructions have the same number of cycles
Example: Digital Filtering • The basic FIR Filter equation is Where h[k] is an array of constants y[n]=0; In C language For (n=0; n<N; n++) { For (k = 0; k<N; k++) //inner loop y[n] = y[n] + h[k]*x[n-k]; } Copied from Rony Ferzli: http: //www. fulton. asu. edu/~karam/eee 498/ Only Multiply and Accumulate (MAC) is needed!
MAC using General Purpose Processor (GPP) R 0 11 12 3 11 X R 1 1 24 R 2 44 9 2 Clr A ; Clear Accumulator A 3 Clr B ; Clear Accumulator B Mov *R 0, Y 0 ; Move data from memory location 1 to register Y 0 Mov *R 1, X 0 ; Move data from memory location 2 to register X 0 Mpy X 0, Y 0, A ; X 0*Y 0 ->A Add A, B ; A + B -> B Inc R 0 ; R 0 + 1 -> R 0 Inc R 1 ; R 1 + 1 -> R 1 Dec N ; Dec N (initially equals to 3) Tst N ; Test for the value Jnz Loop ; Different than zero loop again Copied from Rony Ferzli: http: //www. fulton. as u. edu/~karam/eee 49 8/ Loop
MAC using DSP • Harvard Architecture allows multiple memory reads 11 12 3 11 R 2 44 24 X 1 9 2 3 Clr A ; Clear Accumulator A Rep N ; Rep N times the next instruction MAC *(R 0)+, *(R 1)+, A ; Fetch the two memory locations pointed by R 0 and R 1, multiply them together and add the result to A, the final result is stored back in A Mov A, *R 2 ; Move result to memory Copied from Rony Ferzli: http: //www. fulton. asu. edu/~karam/eee 498/
Copied from [DSPPrimer-Slides]
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