Figure 8 1 PIC 18 F 458 Pin

Figure 8 -1. PIC 18 F 458 Pin Diagram

Figure 8 -2 a. PIC 18 F 458 Power. On Reset Circuit

Figure 8 -2 b. PIC 18 F 458 Power-On Reset with a Momentary Switch

Figure 8 -3. Minimum Connection for PIC 18 F 458

Figure 8 -4. CONFIG Register Memory Map

Figure 8 -5. CONFIG 1 H Register for Frequency Selection

Figure 8 -6 a. OSC 1–OSC 2 Connection to Crystal Oscillator

Figure 8 -6 b. OSC Connection to an External Clock Source

Figure 8 -7. CONFIG 2 L Configuration Register for Reset Voltage

Figure 8 -8. CONFIG 2 H Configuration Register for Watchdog Timer

Figure 8 -9. CONFIG 4 L Configuration Register for Background Debugger

Figure 8 -10. Intel Hex File Test Program with the INHX 8 M Option

Figure 8 -11. List File for Test Program with the INHX 8 M Option

Figure 8 -11. List File for Test Program with the INHX 8 M Option (cont. )

Figure 8 -12. ROM Space for Chips with 32 -bit Addressing

Figure 8 -13. Intel Hex (INHX 32) File Test Program as Provided by the Assembler

Figure 8 -14. List File for Test Program with INHX 32 Option (Notice ORG address for QDELAY)

Figure 8 -14. List File for Test Program with INHX 32 Option (Notice ORG address for QDELAY) (cont. )

Figure 8 -15. The Odd and Even Banks for External Memory of PIC 18

Figure 8 -16. ICSP Connections

Figure 8 -17. PIC 18 F Connection to PICkit 2 with 6 -Pin Header

Figure 8 -18. PICkit 2 Programmer Utility

Figure 8 -19: Shell of a Simple Assembly Language Program for MPLAB

Figure 8 -20: Shell of a Simple C Language Program for MPLAB