Figure 1 1 Graph of an analog quantity

Figure 1. 2 Sampled-value representation (quantization) of the analog quantity in Figure 1– 1.

Figure 1. 3 A basic audio public address system. Digital Fundamentals, Tenth Edition Thomas

Figure 1. 4 Basic block diagram of a CD player. Only one channel is

Figure 1. 5 Logic level ranges of voltage for a digital circuit. Digital Fundamentals,

Figure 1. 6 Ideal pulses. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright ©

Figure 1. 7 Nonideal pulse characteristics. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright

Figure 1. 8 Examples of digital waveforms. Digital Fundamentals, Tenth Edition Thomas L. Floyd

Figure 1. 9 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 10 Example of a clock waveform synchronized with a waveform representation of

Figure 1. 11 Example of a timing diagram. Digital Fundamentals, Tenth Edition Thomas L.

Figure 1. 12 Illustration of serial and parallel transfer of binary data. Only the

Figure 1. 13 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 14 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 15 The basic logic operations and symbols. Digital Fundamentals, Tenth Edition Thomas

Figure 1. 16 The NOT operation. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright

Figure 1. 17 The AND operation. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright

Figure 1. 18 The OR operation. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright

Figure 1. 19 The comparison function. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright

Figure 1. 20 The addition function. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright

Figure 1. 21 An encoder used to encode a calculator keystroke into a binary

Figure 1. 22 A decoder used to convert a special binary code into a

Figure 1. 23 Illustration of a basic multiplexing/demultiplexing application. Digital Fundamentals, Tenth Edition Thomas

Figure 1. 24 Example of the operation of a 4 -bit serial shift register.

Figure 1. 25 Example of the operation of a 4 -bit parallel shift register.

Figure 1. 26 Illustration of basic counter operation. Digital Fundamentals, Tenth Edition Thomas L.

Figure 1. 27 Block diagram of a tablet-bottling system. Digital Fundamentals, Tenth Edition Thomas

Figure 1. 28 Cutaway view of one type of fixed-function IC package (dual in-line

Figure 1. 29 Examples of through-hole and surface-mounted devices. The DIP is larger than

Figure 1. 30 Examples of SMT package configurations. Parts (e) and (f) show bottom

Figure 1. 31 Pin numbering for standard types of IC packages. Top views are

Figure 1. 32 Typical digital oscilloscopes. Used with permission from Tektronix, Inc. Digital Fundamentals,

Figure 1. 33 Basic comparison of analog and digital oscilloscope operation. Digital Fundamentals, Tenth

Figure 1. 34 Block diagram of an analog oscilloscope. Digital Fundamentals, Tenth Edition Thomas

Figure 1. 35 Block diagram of a digital oscilloscope. Digital Fundamentals, Tenth Edition Thomas

Figure 1. 36 Representation of a typical digital oscilloscope front panel. Numbers below screen

Figure 1. 37 Comparison of an untriggered and a triggered waveform on an oscilloscope.

Figure 1. 38 Displays of the same waveform having a dc component. Digital Fundamentals,

Figure 1. 39 An oscilloscope voltage probe. Used with permission from Tektronix, Inc. Digital

Figure 1. 40 Probe compensation conditions. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright

Figure 1. 41 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 42 Typical logic analyzer. Used with permission from Tektronix, Inc. Digital Fundamentals,

Figure 1. 43 Simplified block diagram of a logic analyzer. Digital Fundamentals, Tenth Edition

Figure 1. 44 Two logic analyzer display modes. Digital Fundamentals, Tenth Edition Thomas L.

Figure 1. 45 A typical multichannel logic analyzer probe. Used with permission from Tektronix,

Figure 1. 46 Typical signal generators. Used with permission from Tektronix, Inc. Digital Fundamentals,

Figure 1. 47 Typical DMMs. Courtesy of B+K Precision. ® Digital Fundamentals, Tenth Edition

Figure 1. 48 Typical dc power supplies. Courtesy of B+K Precision. ® Digital Fundamentals,

Figure 1. 49 Illustration of how a typical logic pulser and a logic probe

Figure 1. 50 Programmable logic. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright ©

Figure 1. 51 Block diagrams of simple programmable logic devices (SPLDs). Digital Fundamentals, Tenth

Figure 1. 52 A typical SPLD package. Digital Fundamentals, Tenth Edition Thomas L. Floyd

Figure 1. 53 General block diagram of a CPLD. Digital Fundamentals, Tenth Edition Thomas

Figure 1. 54 Typical CPLD packages. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright

Figure 1. 55 Basic structure of an FPGA. Digital Fundamentals, Tenth Edition Thomas L.

Figure 1. 56 A typical ball-grid array (BGA) package. Digital Fundamentals, Tenth Edition Thomas

Figure 1. 57 Basic setup for programming a PLD or FPGA. Digital Fundamentals, Tenth

Figure 1. 58 Basic programmable logic design flow block diagram. Digital Fundamentals, Tenth Edition

Figure 1. 59 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 60 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 61 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 62 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 63 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

Figure 1. 64 Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by

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Figure 1. 1 Graph of an analog quantity (temperature versus time). Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 2 Sampled-value representation (quantization) of the analog quantity in Figure 1– 1. Each value represented by a dot can be digitized by representing it as a digital code that consists of a series of 1 s and 0 s. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 3 A basic audio public address system. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 4 Basic block diagram of a CD player. Only one channel is shown. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 5 Logic level ranges of voltage for a digital circuit. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 7 Nonideal pulse characteristics. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 8 Examples of digital waveforms. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 10 Example of a clock waveform synchronized with a waveform representation of a sequence of bits. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 11 Example of a timing diagram. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 12 Illustration of serial and parallel transfer of binary data. Only the data lines are shown. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 15 The basic logic operations and symbols. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 21 An encoder used to encode a calculator keystroke into a binary code for storage or for calculation. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 22 A decoder used to convert a special binary code into a 7 -segment decimal readout. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 23 Illustration of a basic multiplexing/demultiplexing application. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 24 Example of the operation of a 4 -bit serial shift register. Each block represents one storage “cell” or flip-flop. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 25 Example of the operation of a 4 -bit parallel shift register. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 26 Illustration of basic counter operation. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 27 Block diagram of a tablet-bottling system. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 28 Cutaway view of one type of fixed-function IC package (dual in-line package) showing the chip mounted inside, with connections to input and output pins. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 29 Examples of through-hole and surface-mounted devices. The DIP is larger than the SOIC with the same number of leads. This particular DIP is approximately 0. 785 in. long, and the SOIC is approximately 0. 385 in. long. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 30 Examples of SMT package configurations. Parts (e) and (f) show bottom views. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 31 Pin numbering for standard types of IC packages. Top views are shown. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 32 Typical digital oscilloscopes. Used with permission from Tektronix, Inc. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 33 Basic comparison of analog and digital oscilloscope operation. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 34 Block diagram of an analog oscilloscope. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 35 Block diagram of a digital oscilloscope. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 36 Representation of a typical digital oscilloscope front panel. Numbers below screen indicate the values for each division on the vertical (voltage) and horizontal (time) scales and can be varied using the vertical and horizontal controls on the scope. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 37 Comparison of an untriggered and a triggered waveform on an oscilloscope. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 38 Displays of the same waveform having a dc component. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 39 An oscilloscope voltage probe. Used with permission from Tektronix, Inc. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 40 Probe compensation conditions. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 42 Typical logic analyzer. Used with permission from Tektronix, Inc. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 43 Simplified block diagram of a logic analyzer. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 44 Two logic analyzer display modes. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 45 A typical multichannel logic analyzer probe. Used with permission from Tektronix, Inc. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 46 Typical signal generators. Used with permission from Tektronix, Inc. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 47 Typical DMMs. Courtesy of B+K Precision. ® Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 48 Typical dc power supplies. Courtesy of B+K Precision. ® Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 49 Illustration of how a typical logic pulser and a logic probe can be used to apply a pulse to a given point and check for resulting pulse activity at another part of the circuit. Indications may vary depending on manufacturer. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 51 Block diagrams of simple programmable logic devices (SPLDs). Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 53 General block diagram of a CPLD. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 55 Basic structure of an FPGA. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 56 A typical ball-grid array (BGA) package. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 57 Basic setup for programming a PLD or FPGA. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.

Figure 1. 58 Basic programmable logic design flow block diagram. Digital Fundamentals, Tenth Edition Thomas L. Floyd Copyright © 2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey 07458 All rights reserved.