Example converter errors 1 Sample and hold Also

Example converter errors 1

Sample and hold Also called track and hold, or acquire and hold Switch positions in track mode are shown Sampling happens at the instant when switches change positions 2 Opposite positions are for hold mode

Sample and hold Errors • During tracking – There is a voltage drop across op amp + and ─ terminal – There is voltage drop across S 1 and S 2 as long as Vin is not constant, i. e. , there is current – Both of the above cause Vcap ≠ Vin – Ron of S 1 and S 2 is also signal level dependent, making the above error non linear – This nonlinear error is also slope dependent, making it a dynamic error 3

Sample and hold Errors • During tracking – The two voltage drops also change when there are power supply variations, ground bounces, temperature variations, and 1/f noise. – These effects are common mode – Differential structures, such as the one shown, are much more robust with respect to such errors than single ended structures 4

Cap voltage in the presence of supply variations and ground bounces Single ended structure Differential structure Use differential signaling whenever possible Single ended input may need to be converted first 5

6

7

8

9

10

DAC output buffering • Current to voltage • Voltage to current • Load driving capability • Low pass filtering • Band pass filtering • BP application • HD or IMD capturing

Buffering DAC output

Differential current output DAC to single ended voltage conversion

HW • On the previous slide, assume ideal “conditions”, find the quiescent voltage at each node and quiescent current through each R or C, and label them. Find the small signal transfer function from iod to vo. Verify the approximate f_3 d. B. • Now include some non-idealities. I_out = I_oc + i_od, I_out_bar = I_oc - i_od, the op amp has finite gain Avd and Avc and has input parasitic capacitance C_p+ and C_p-. Still assume correct resistor values and infinite Ro for the current source. Op amp is also linear (gains constant). Find Vo. Q and small signal v_o. 14

CONDITIONING, LEVEL SHIFTING, AMPLIFICATION, S. E. TO DIFF, DC VS AC COUPLING, ETC.

Signal Swing and Common-Mode Range Termination for input source Approximately right only

HW Why RT? How to select RT? Then what’s the true gain? When is the approximation good? If v_in is within V_icm +- V_idsw, and if ADC has input range from V_min to V_max, how should V 1, R 2 be selected?

Series Resistor, RS DUT Output Tester Instrument and Connecting Cable Transmission Line, Characteristic Impedance = Zo Series Resistor, RS DUT Output Termination Resistor, RT=Zo Equivalent Load Termination Resistor, RT=Zo

Op Amp Gain and Level Shifting Circuits

Single-Ended Single-Supply DC-Coupled Level Shifter

Single-ended DC-coupled level shifter and driver

Single-Ended DC-Coupled Single-Supply Level Shifter

Single-Ended to Differential DC-Coupled Driver with Level Shifting

HW • Perform a DC analysis to verify the Q points. What’s the value of Vref? Find the small signal gain from input to Vin+ and small signal gain from input to Vin-. Why the value 53. 6 is used? If the input source has internal resistance Rs = 50 Ohm, how does that affect the Q point and small signal? What would be the p-p value of the signal at the input of the ADC? Why is this actually beneficial? 25

Transformer Coupling into a Differential Input A B C

HW • Why the value of the 200 Ohm resistor? What’s the value of Vcm. • Find the quiescent values at A, B, C, Vin+ and Vin-. • Find the signal range (Vmin to Vmax) at these points. • Find the small AC signal transfer function from the source to vid = vin+ –vin-. 27

Voltage to Current Conversions DC or AC Voltage Source (Vin) V = RS * Iout = Vin Op Amp RS Instrumentation Amplifier (High Impedance Inputs) Iout = Vin / RS DUT

Current to Voltage Conversions Calibration/Checker Source R ATE Measurement Instrument Iout DUT Cal Relay Vout / IIn = -R

Vmid Reference Adder Gain = -1 R AC Signal Source Calibration Instrument R Vin VMID R R DUT

Use Kelvin connection with 4, or five wires RS DUT Test Current, ITEST RM VTEST RM RG Load Resistance, RL Device Zero (DZ) Device Ground Sense (DGS) Line

Source 1 Source 2 Source 3 HF HS LF LS IN+ DC Meter IN- DIB HF HS LF LS DUT DZ IN+ DGS Line Digitizer IN-

Use Kelvin connection to add ripple for PSRR Ripple cannot be easily added to VDD directly LDO feedback rejects ripple being added Calibration Instrument DC Source VP PSRR Ripple Signal HF R 2 VDD HS C R 1 LF LS DUT

Keep the hot/return pair of wires close, or twisted

Separate digital and analog ground returns

Mixed-signal interfacing

Power and Ground Planes DUT +5 V Pin DUT AGND Pin DUT DGND Pin DIB Circuit Ground Input (High Impedance) Layer 1 (Digital Signals) Layer 2 (DGND Plane) Layer 3 (Split Power Plane) Layer 4 (AGND Plane) Layer 5 (QGND Plane) Layer 6 (Analog Signals) DZ AGND to DGND Connection (Single Point) Power Plane Split

Be careful with possible ground loops Instrument Probe Test Head Bench and DIB Instrument Bench Instrument Safety Ground Loop Earth Ground Tester Mainframe Tester Instrument Ground Tester Safety Ground

Clock distribution from digital to analog