ENGG 1015 Tutorial n n n Digital Logic






































































- Slides: 70
ENGG 1015 Tutorial n n n Digital Logic (II) (70 pages) 15 Oct Learning Objectives q n News q n Learn about Boolean Algebra (So. P/Po. S, Dr. Morgan's Theorem, simplification), Karnaugh map, Full adder, Flip Flop, Counter, Finite State Machine… Safety in Lab Ack. : HKU ELEC 1008, ISU Cpr. E 281 x, PSU CMPEN 270, Wikimedia Commons 1
Electrical Safety n n n 5 -10 ma can cause death Skin resistance can range from 1 kΩ for wet skin to 500 kΩ for dry skin. Death can result from as low as 50 volts Body can sense 9 volts under the right conditions NO Slippers, NO Sandals in Lab Report to TA or technician for any emergency case
Boolean Algebra n Boolean Algebra A+B=B+A A + (B + C) = (A + B) + C A + BC = (A + B) (A + C) A + AB = A n AB = BA A (BC) = (AB) C A (B+C) = AB + AC A (A + B) = A De Morgan's theorem q Ways for simplification 3
Digital Logic n Equivalent logic using De Morgan's theorem q q AND NOT OR OR NOT AND OR NOT OR AND NOT 4
Quick Checking 5
Quick Checking Any logic function may be implemented by using only OR and NOT gates or only AND and NOT gates 6
Questions for Boolean Algebra 7
Solutions 8
Boolean Algebra Simplification n n Sum of Products q How to make “ 1”? q Better if less “ 1” Products of Sum q How to make “ 0”? q Better if less “ 0” 9
Boolean Algebra Using SOP and POS n Find out the expression 10
Boolean Algebra Using SOP and POS n What about the alternative expression? 11
Question 1: Boolean Algebra (So. P/Po. S) n Find an expression for F and 12
Solution 1 n Sum of Products for F n Product of Sums for F 13
Solution 1 n Sum of Products for n Product of Sums for 14
Question 2: Boolean Algebra (De. Morgan's Theorem) n Use De. Morgan's Theorem to simplify the following expressions 15
Solution 2 n n n 16
Question 3: Circuit representation of logic equations n Show can be implemented with one two-input NOR and one two-input NAND gate. 17
Solution 3 n Show can be implemented with one two -input NOR and one two-input NAND gate. n (How to convert q ? ) We need to apply De Morgan’s Theorem 18
Question 4: Circuit representation of digital logic n n a) Simplify the circuit shown in the figure using Boolean algebra. b) Change each NAND gate in the circuit of the figure to a NOR gate, and simplify the circuit using Boolean algebra. 19
Solution 4 a Procedure: 1) Obtain the Boolean expression from the circuit 2) Check if we need NAND/NOR gate 3) Simplify the expression by Boolean algebra and adding double inversion 20
Solution 4 b n First, we convert the circuit 21
Solution 4 b n Then, we simplify the Boolean expression (De. Morgan's Theorem) (Expand) (Simplify) (Group, Group) 22
Solution 4 b (Group, Group) (Simplify) (Expand) (Simplify) 23
Question 5: Circuit representation of digital logic n Construct the given circuit using NAND gates only q q Top down approach: ? Bottom up approach: ? 24
Solution 5 a n n Top down: Expanding the Boolean expression By De. Morgan’s Theorems, 25
Solution 5 b n i) Bottom-up: Construct NOT gate, AND gate and OR gate from NAND gate iii ) 26
Solution 5 b (cancelled) n Top-down and Bottom-up: Same number of gate, same configuration, different approach 27
Question 6: Conversion of three representations n n Describe the function using Boolean expressions Draw the truth table and describe the function using sum of product 28
Solution 6 Approach 1: Boolean simplification Find TT Approach 2: Construct TT Find POS (De Morgan) (XOR expansion) (De Morgan) (expansion) (grouping, expansion) (cancellation) POS: 29
Quick Checking n i) Construct NOT gate, AND gate and OR gate from NAND gate iii ) 30
Karnaugh map n n Draw the table; Fill in 0 s and 1 s; Grouping Group one/two/four/eight/ sixteen ‘ 1’(s) only Use the least number of groups to group all numbers To group as many numbers as possible in a group 31
Examples of Karnaugh maps 32
Question 7: Simplification using Kmap n Simplify the following Boolean expressions using Karnaugh map. 33
Solution 7 i) A/B 0 1 0 0 0 1 1 1 ii) A/BC 00 01 11 10 0 1 1 1 1 34
Question 8: Logic Simplification n n Simplify the Boolean expression of the circuit Change each NAND gate in the circuit to a NOR gate, and simplify the Boolean expression of the circuit 35
Solution 8 a (Expand) (Group) Solve by expression simplification 36
Solution 8 a M 0 0 1 1 N 0 0 1 1 Q 0 1 0 1 x 0 0 0 1 0 1 From truth table to K-map NQ M 00 01 11 10 0 1 0 1 1 0 Solve by K-map 37
Solution 8 b Solve by expression simplification 38
Solution 8 b 39
Solution 8 b M 0 0 1 1 N 0 0 1 1 Q 0 1 0 1 x 0 1 0 1 1 1 NQ M 00 01 11 10 0 0 1 1 1 Solve by K-map 40
Arithmetic Circuit n Half Adder CS=A+B single bit q C: Carry S: Sum n Full Adder Co. S=A+B+Ci single bit q e. g. Parallel Adder 41
Question 9: Full Adder Design n n Construct the Boolean expression of a FA Verify it by constructing a truth table 42
Solution 9 (Find out expression of S 1 and C 2) 43
Solution 9 Any alternative approach? 44
Solution 9 n Half Adder CS=A+B A B C S 0 0 0 1 1 0 45
Solution 9 n Full Adder A 0 0 1 1 B Ci Co 0 0 1 1 1 0 0 1 1 1 0 1 1 Co. S=A+B+Ci S 0 1 1 0 0 1 Find out expression using SOP 46
Quick Checking n What is the simplest logic expression? NQ M 00 01 11 10 0 0 1 1 1 47
Question 10: Flip Flop (FF) n How many FFs are required to build a binary counter that counts from 0 to 1023? q q n From “ 0” to “ 1023” Range = 1024 Number of FF required = 10 (since 210=1024) Determine the frequency at the output of the last FF of this counter for an input clock frequency of 2 MHz. q q 1, 2, …, 1024, …, 1, 2, …, 1024 How many times? With 10 FFs, the range is 1024, therefore, the frequency division at the last FF will be 1/1024 relative to the input check. Thus, output frequency = 2 MHz/1024 = 1953 Hz 48
Question 10 n If the counter is initially at zero, what count will it hold after 2060 pulses? q Every 1024 pulses the counter recycles through zero. Thus, after 2048 pulses the counter is back at count zero. Therefore, after 2060 pulses the counter will be at count 12 (i. e. 2060 = 1024 + 12) 1, 2, …, 1024, 1, 2, …, 11, 12 2060 pulses 49
Question 11: Counter n Figure a) shows a complete four-bit parallel adder with registers and b) shows the signals used to add binary numbers from memory and store their sum in the accumulator. Suppose the numbers being added are 1001 and 0101. Also assume that Co=0. Describe what happen at t 1, t 2, t 3, t 4 and t 5. 50
Solution 11 51
52
53
54
Finite State Machine (FSM) n Circuit components q n Flip Flops (FFs); Clock; Logic gates; Input; Output State q q Present state: before clock Next state: after clock State transition: during clock n FFs 2 n states 55
A more complicated FSM conversion example n FSM / Truth table / Circuit Store the state Logic for state transition Logic for output 56
Steps in designing a state machine n Start writing a state transition diagram q q q n An initial state Other states to keep track of various activities Transitions Generate a state transition table and a output table q Write state transition table and output table in binary n n n State assignment, i. e. , the code used for each state Derive canonical sum-of-product expressions Draw the circuit 57
From FSM to truth table n Four states 2 x 1 b register for q/q* (q: present) (q*: next) 58
From FSM/Truth Table to circuit n FFs; Clock; Logic gates; Input; Output clk 59
Question 12: A simple FSM design n Design a state machine that will repeatedly display in binary values 1, 3, 5, and 7 q How many states we need? S 0, S 1, S 2, S 3 q Simplified state transition diagram? q 60
Solution 12 Current Output Current state Output X Y L 2 L 1 L 0 S 0 (00) 0 0 1 1 0 1 0 1 1 1 (001) Output table S 1 (01) 3 (011) 0 L 2 = XY'+XY = X S 2 (10) 5 (101) 1 7 (111) 1 L 1 = X'Y+XY = Y S 3 (11) L 0 = X'Y'+X'Y+XY'+XY = 1 n State transition table Current state Next state X = X'Y+XY' S 0 (00) S 1 (01) Y = X'Y+XY' = Y' S 1 (01) S 2 (10) n Current Next X Y 0 0 0 1 1 0 S 2 (10) S 3 (11) 1 0 1 1 S 3 (11) S 0 (00) 1 1 0 0 61
Question 13: A typical FSM design n Design a 2 -bit counter with input x that can be q q A down counter when x = 0 (… 11 10 01 00 11 …) A Johnson counter when x = 1 (… 00 01 11 10 00 …) From FSM to Truth table 62
Solution 13 n From truth table to circuit 63
Question 14: A practical FSM design n Vending Machine q n Collect money, deliver product and change Vending machine may get three inputs, n, d, q q q q Inputs are nickel (5 c), dime (10 c), and quarter (25 c) Only one coin input at a time Product cost is 40 c Does not accept more than 50 c (blocks the coin slot) Returns 5 c or 10 c back Exact change appreciated 64
Solution 14 n n n We are designing a Mealy state machine (i. e. , output depends on both current state and inputs). Suppose we ask the machine to directly return the coin if it cannot accept an input coin. Inputs: I 1 I 2 q q n Represent the coin inserted 00 - no coin (0 cent), 01 – nickel (5 cents), 10 – dime (10 cents), 11 – quarter (25 cents) Outputs: C 1 C 2 P q q C 1 C 2 represent the coin returned P indicates whether to deliver product 65
Solution 14 n States: S 1 S 2 S 3 q q Represent the money inside the machine now 3 bits are enough to encode the states Notice the names (they need not be S 0, S 1…. ) S 00 – 000, S 05 – 001, S 10 – 010, S 15 – 011, S 20 – 100, S 25 – 101, S 30 – 110, S 35 – 111 66
Solution 14 67
Solution 14 Next state Input Output 11/110 11/000 01/000 10/000 n n n S 35 11/110 – S 35 10/011 – S 00 01/001 – S 00 S 35: Currently the machine has 35 cents S 35: Four possible inputs and three possible outputs e. g. 11/110 : If we insert a quarter (11), then the machine should return one quarter and zero product (110) q 35 c (35 cents inside the machine now) + 25 c (insert 25 cents) = 35 c (35 cents inside the machine in the next state) + 25 c (return 25 cents) + 0 c (return no product) 68
Solution 14 n S 35 11/110 – S 35 10/011 – S 00 01/001 – S 00 e. g. 10/011: If we insert a dime (11), then the machine should return one nickel and one product (011) q n 11/110 11/000 01/000 10/000 35 c (35 cents inside the machine now) + 10 c (insert 10 cents) = 0 c (zero cent inside the machine in the next state) + 5 c (return 5 cents) + 40 c (return one product) e. g. 01/110: If we insert a nickel (01), then the machine should return zero coin and one product (001) q 35 c (35 cents inside the machine now) + 5 c (insert 5 cents) = 0 c (zero cent inside the machine in the next state) + 0 c (return zero cent) + 40 c (return one product) 69
Electrical Safety n n n 5 -10 ma can cause death Skin resistance can range from 1 kΩ for wet skin to 500 kΩ for dry skin. Death can result from as low as 50 volts Body can sense 9 volts under the right conditions NO Slippers, NO Sandals in Lab Report to TA or technician for any emergency case 70