Enabling hardware acceleration in OVSDPDK using DPDK Framework

Enabling hardware acceleration in OVS-DPDK using DPDK ‘Framework’ Sugesh Chandran

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Introduction • Hardware acceleration in OVS-DPDK. • Challenges of enabling hardware acceleration in OVS-DPDK • DPDK ‘Framework’ , what is it? • DPDK Framework components primer. • Hardware acceleration enablement in OVS-DPDK using DPDK ‘Framework’ • Future work/Next steps.

Hardware acceleration in OVS-DPDK • Partial acceleration: - Accelerate software datapath by offloading a portion from the packet processing pipeline. • Full acceleration: - Hardware can do end to end packet processing pipeline. Packets are either handled in Software or Hardware datapath.

Partial HW acceleration in OVS-DPDK User OVSDB vswitchd Virtio Ingress Match Flow Actions Egress Datapath Host HW Preprocessing Postprocessing NIC

Partial HW acceleration in OVS-DPDK User OVSDB vswitchd Virtio Ingress Match Flow Actions Egress Datapath Host HW Preprocessing Postprocessing NIC 6

Full HW acceleration in OVS-DPDK User OVSDB vswitchd Virtio/ VF Ingress Match Flow Actions Egress SW DP Host Datapath HW Ingress Match Flow Actions Egress HW DP 7

Challenges • Feature Parity and Interoperability. • Scalability. • Optimized hardware resource allocation. • Availability of HW acceleration support in OS, tools and other SW components. • Cost of Hardware acceleration setup Vs achievable performance improvement with it. • Live migration support.

DPDK Framework

DPDK ‘Framework’ in OVS-DPDK 1. OVS-DPDK init with hardware acceleration. OVSDB vswitchd SW Datapath SWITCH APIs EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA RTEFLOW DPDK Framework PHY 18

DPDK ‘Framework’ in OVS-DPDK 1. OVS-DPDK init with hardware acceleration. • • OVSDB vswitchd 1 SW Datapath $ ovs-vsctl set Open_v. Switch. other_config: dpdk-hw-offload-init=true SWITCH APIs $ ovs-vsctl set Open_v. Switch. other_config: dpdk-hw-offloadids="0000: 5 e: 00. 0“ EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA PHY RTEFLOW DPDK Framework

DPDK ‘Framework’ in OVS-DPDK 1. OVS-DPDK init with hardware acceleration. • • OVSDB vswitchd 1 SW Datapath $ ovs-vsctl set Open_v. Switch. other_config: dpdk-hw-offload-init=true SWITCH APIs $ ovs-vsctl set Open_v. Switch. other_config: dpdk-hw-offloadids="0000: 5 e: 00. 0“ EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA PHY 2 RTEFLOW DPDK Framework

DPDK ‘Framework’ in OVS-DPDK 1. OVS-DPDK init with hardware acceleration. • • OVSDB vswitchd 1 SW Datapath $ ovs-vsctl set Open_v. Switch. other_config: dpdk-hw-offload-init=true SWITCH APIs $ ovs-vsctl set Open_v. Switch. other_config: dpdk-hw-offloadids="0000: 5 e: 00. 0“ 3 EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA PHY 2 RTEFLOW DPDK Framework

DPDK ‘Framework’ in OVS-DPDK 1. OVS-DPDK init with hardware acceleration. • • 4 OVSDB vswitchd 1 SW Datapath $ ovs-vsctl set Open_v. Switch. other_config: dpdk-hw-offload-init=true SWITCH APIs $ ovs-vsctl set Open_v. Switch. other_config: dpdk-hw-offloadids="0000: 5 e: 00. 0“ 3 EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA PHY 2 RTEFLOW DPDK Framework

DPDK ‘Framework’ in OVS-DPDK -contd 2. Add a hardware accelerated port to OVSDPDK. • OVSDB vswitchd 1 SW Datapath SWITCH APIs ovs-vsctl --timeout 10 add-port br 0 port 0 – set Interface port 0 type=dpdkhw options: device-id=0, port-id=0 EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA PHY RTEFLOW DPDK Framework

DPDK ‘Framework’ in OVS-DPDK -contd 3. Report exception packet to OVS-DPDK. OVSDB vswitchd SW Datapath SWITCH APIs EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA PHY RTEFLOW DPDK Framework

DPDK ‘Framework’ in OVS-DPDK -contd 4. Install flow into SW datapath. OVSDB vswitchd SW Datapath SWITCH APIs EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA PHY RTEFLOW DPDK Framework

DPDK ‘Framework’ in OVS-DPDK -contd 4. Install flow into FPGA hardware. OVSDB vswitchd SW Datapath SWITCH APIs EXPTHANDLE R PORT REP. VDPA TUNNEL APIs QOS Host FPGA Driver HW FPGA PHY RTEFLOW DPDK Framework

Current Status % completed OVSDB vswitchd SW Datapath SWITCH APIs PORT REP. EXPTHANDLER TUNNEL APIs QOS Host HW VDPA FPGA Driver FPGA PHY RTE-FLOW DPDK Framework

Next Steps • Continue the publishing of DPDK ‘Framework’ APIs and implementation in the DPDK ML. • Publish the RFC design to the OVS-DPDK mailing list to get early feedback on the proposal and implementation. • Publish OVS-DPDK implementation using DPDK ‘Framework’ to OVS mailing list.

Summary § The marriage of OVS-DPDK with hardware acceleration provides a compelling solution to meet the needs of telco NFV workloads. § Abstracting away all the hardware features by handling them implicitly doesn’t always yield an optimum solution. § OVS-DPDK hardware acceleration enablement should be flexible, extendable and capable of using the hardware features in generic way. § DPDK ‘Framework’ offers all the needed libraries for hardware acceleration enablement in applications such as OVS-DPDK.

Questions? sugesh. chandran@intel. com