ELECTRONIC DE Course Code EET 109 Chapter 6

  • Slides: 75
Download presentation
ELECTRONIC DE Course Code: EET 109 Chapter 6: Field Effect Transistor (FETs)

ELECTRONIC DE Course Code: EET 109 Chapter 6: Field Effect Transistor (FETs)

OVERVIEW q Introduction of Field Effect Transistor (FET) • JFET • MOSFET Junction Field

OVERVIEW q Introduction of Field Effect Transistor (FET) • JFET • MOSFET Junction Field Effect Transistor (JFET) q Operation of JFET q Characteristic of JFET q Parameter of JFET q Analyzed How JFETs are Biased N channel P channel Metal Oxide Semi conductor Field Effect Transistor (MOSFET) q Operation of MOSFET q Characteristic of MOSFET q Parameter of MOSFET q Analyzed How MOSFETs are Biased q Troubleshoot FET circuit E D 2

OVERVIEW Transistor Bi-Polar Junction Transistor ( BJT) Junction Field Effect Transistor (JFET) n channel

OVERVIEW Transistor Bi-Polar Junction Transistor ( BJT) Junction Field Effect Transistor (JFET) n channel Field Effect Transistor (FET) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) p channel D-MOSFET • n channel • p channel E-MOSFET • n channel • p channel

WHY TRANSISTOR IS VERY IMPORTANT IN OUR TECHNOLOGY ?

WHY TRANSISTOR IS VERY IMPORTANT IN OUR TECHNOLOGY ?

Introduction FET BJT • Bipolar Device used both electron and hole current. • Current

Introduction FET BJT • Bipolar Device used both electron and hole current. • Current controlled device (Ic, Ib, Ie) VS • Unipolar devices • Operate only with one type of charger carrier. • It is a voltage controlled device(Vgs, Vds). • Advantages: • FET is very high input resistance. • In switching applications, FET is faster than BJTs when turned on and off. 5

Introduction- FET • FET is a "Unipolar" device that depends only on the conduction

Introduction- FET • FET is a "Unipolar" device that depends only on the conduction of electrons (N-channel) or holes (P-channel). • FET – a three-terminal voltagecontrolled device used in amplification and switching Application. • FET is a voltage-controlled device. • FET high input resistance. It very sensitive to input voltage signals, and easily damaged by static electricity.

JFET Basic Structure n channel Characteristics p channel Parameters Biasing

JFET Basic Structure n channel Characteristics p channel Parameters Biasing

JFET- Basic Structure • The terminals of a JFET are the Source (S), Gate

JFET- Basic Structure • The terminals of a JFET are the Source (S), Gate (G), and Drain (D). • A JFET can be either p channel or n channel. • The arrow on the gate points “in” for n channel & “out” for p channel. JFET Schematic Symbol 8

JFET – Basic Operation ( DC Biasing to n channel) • VDD provide a

JFET – Basic Operation ( DC Biasing to n channel) • VDD provide a drain-to-source voltage and supplies current from Drain to Source (VDS) • VGG sets the reverse-bias voltage between gate and source, (VGS). • JFET is always operated with gate-source(GS) pn-junction reverse-biased. • GS junction never allowed to become forward-biased because the gate material is not designed to handle any significant amount of current. it may destroy the component. 9

JFET Parameters Characteristics Basic Structure DCC (Drain Characteristic Curve) X -Axis: VDS (V) Y-Axis:

JFET Parameters Characteristics Basic Structure DCC (Drain Characteristic Curve) X -Axis: VDS (V) Y-Axis: IDS (m. A) Vgs= 0 Vgs= -ve Biasing TCC (Transfer Characteristic Curve) X -Axis: - Vgs (V) Y-Axis: IDS (m. A Data Sheet 1) Typ 2) Max 3)Min Equation:

JFET Characteristic: Drain Characteristic Curve (DCC)

JFET Characteristic: Drain Characteristic Curve (DCC)

JFET Characteristics: VGS=0 Case 1: When the gate-to-source voltage, VGS=0 V. • This is

JFET Characteristics: VGS=0 Case 1: When the gate-to-source voltage, VGS=0 V. • This is produced by shorting the gate to source junction. • Terminal Gate and Source, both are grounded. • The characteristic of JFET need to be explain deeply by using Drain 12 characteristic curve (DCC).

VGS=0 ( JFET Drain Characteristic Curve) , DCC Y axis ID Range: 0 IDSS

VGS=0 ( JFET Drain Characteristic Curve) , DCC Y axis ID Range: 0 IDSS unit: m. A X axis VDS Range: 0 ∞ unit: V Point Region A to B Ohmic Region • • ID increases proportionally with increases of VDD (VDS increases as VDD increases). called the ohmic region VDS and ID are related by Ohm’s Law. Pinch-off Voltage, VP • • The Curve level off. ID becomes essentially constant. (V DS=Vp) Constant current (Active Region) • • • ID still constant. Because, as VDS ↑, the reverse-bias voltage from gate to drain (VGD) produces a depletion region large enough to offset the increase in VDS. This current is called maximum drain current (IDSS). • • • Breakdown occur when ID begins to increase rapidly with any increase in VDS. Can caused irreversible damage the to the device. so JFETs operation is always well below this value. B B to C C Breakdown. Description 13

VGS = - ve ( JFET Drain Characteristic Curve) , DCC Case 2 :

VGS = - ve ( JFET Drain Characteristic Curve) , DCC Case 2 : As VGS is set to more – ve value by adjusting VGG • VGS is set to increasingly more negative by adjusting VGG become -1 V. • Therefore the value of VGS become = -1 V. • A Drain Characteristic Curves is produced. 14

VGS = - ve ( JFET Drain Characteristic Curve) , DCC • As VGS

VGS = - ve ( JFET Drain Characteristic Curve) , DCC • As VGS is set to more negative values by adjusting VGG, the ID becomes decrease because of the narrowing of the channel. • VGS =0 and Vp is benchmark point. • For each increasing in negative value of VGS the JFET reaches of their own pinchoff point (where the point of current constant begins). • This values must less than Vp for VGS= 0. 15

JFET Characteristics : Cutoff Voltage, VGS (off) • The value of VGS will be

JFET Characteristics : Cutoff Voltage, VGS (off) • The value of VGS will be given in Data Sheet. • The value of VGS that makes ID approximately zero is called Cutoff voltage, VGS(off). • When VGS(off) (a very large –ve value), ID ≈ 0. • When VGS=0, ID= maximum IDSS. • The JFET must be operated between VGS=0 and V The GS(off). operating limits of JFET are: ID≈0 VGS=VGS(off) ID=IDSS VGS = 0 • Pinch-off voltage (Vp) and cutoff voltage (VGS(off)) are both the same value, but opposite in sign. • Example: VGS(off) = -5 V, then VP = +5 V. 16

POP QUIZ 1 - SUBMIT Draw and explain each point of Drain Characteristic Curve

POP QUIZ 1 - SUBMIT Draw and explain each point of Drain Characteristic Curve (DCC). Hint: • Axis/unit • Point A, B, C. (Name the region). • Point & Value Pinch off voltage , Vp. • Point & Value Cutoff voltage, Vgs(off).

JFET Characteristics ( n vs p channel) N -channel P -channel • The basic

JFET Characteristics ( n vs p channel) N -channel P -channel • The basic operation of P-channel JFET is the same as for an n- channel device except: • P-channel JFET requires a negative VDD and positive VGS • For p-channel, VGS(off) is positive and for n-channel JFET, VGS(off) is negative 18

POP- QUIZ 2 - SUBMIT For the JFET in Figure below, given VGS(off) =

POP- QUIZ 2 - SUBMIT For the JFET in Figure below, given VGS(off) = -4 V and IDSS =12 m. A. Determine minimum value of VDD required to put the device in the constant-current region of operation when VGS = 0 V. Draw the complete DCC for this JFET. Solution: 1) Identify type of channel ( n or p type)? 2)List out all the info given: VGS(off) = -4 V IDSS = 12 m. A VGS = 0 V (constant region) 19

TAKE HOME QUIZ 1 Q) A particular n-channel JFET has a VGS(off)= - 5

TAKE HOME QUIZ 1 Q) A particular n-channel JFET has a VGS(off)= - 5 V and IDSS= 10 m. A a) Draw the complete DCC of the JFET. b) What is Vp for the JFET ? c) What is ID when VGS= -7 V? 20

SUMMARY of DCC • The range of VGS values from zero to VGS(off) controls

SUMMARY of DCC • The range of VGS values from zero to VGS(off) controls the amount of ID. • For n channel JFET VGS(off) is negative. • For p channel JFET VGS(off) is positive. • So that, the relationship between ID and VGS is very importance. • For DCC show value of VGS. • Y AXIS unit: • X AXIS unit: • Equation involved

JFET Characteristics : Transfer Characteristics Curve, TCC • TCC will show the value of

JFET Characteristics : Transfer Characteristics Curve, TCC • TCC will show the value of ID at certain value of VGS . • A JFET transfer characteristic curve is expressed approximately as: (Square Law) Transfer Characteristic Curve, TCC • ID can be determined for any VGS if VGS(off) and IDSS are known. • VGS(off) and IDSS are usually available from the JFET datasheet. Y axis ID Range: 0 IDSS unit: m. A X axis -VGS Range: 0 VGS(off) unit: V 22

 • Transfer characteristic curve (blue) can be developed from Drain characteristic curves (green)

• Transfer characteristic curve (blue) can be developed from Drain characteristic curves (green) by plotting values of ID for the values of VGS taken from drain curves at pinch-off, Vp. • • When VGS = - 2 V, ID = 4. 32 m. A. When VGS = 0 V, ID = IDSS = 12 m. A. 23

POP QUIZ 3 - SUBMIT Q) Given IDSS of JFET n channel is 6

POP QUIZ 3 - SUBMIT Q) Given IDSS of JFET n channel is 6 m. A and VGS(off)= -7 V. By using these values , determine the drain current, ID for VGS=0 V , VGS=-4 V and VGS= -6 V, VGS= -8 V. Then draw the TCC of the JFET. When: VGS = 0 VGS = -4 V VGS = -6 V VGS = -8 V ID = ?

DATA SHEET 25

DATA SHEET 25

POP-QUIZ 4 - SUBMIT The partial datasheet below for a 2 N 5459 JFET

POP-QUIZ 4 - SUBMIT The partial datasheet below for a 2 N 5459 JFET indicates that typically IDSS = 9 m. A and VGS(off) = -8 V (maximum). Using these values, determine the drain current for VGS = 0 V, -1 V and -4 V and draw the Transfer characteristic Curve (TCC) and Drain Characteristic Curve (DCC). Min Typ Max Units 26

TAKE HOME QUIZ 2 Q 4) Determine ID for VGS = -1 V, -2

TAKE HOME QUIZ 2 Q 4) Determine ID for VGS = -1 V, -2 V, -3 V, -4 V and -5 V for the 2 N 5457& 2 N 5458 JFET. Then draw Transfer Characteristic Curve and Drain Characteristic Curve for both JFET. Solution: From datasheet: IDSS =? ? , VGS(off) = ? ? VGS = -1 V, ID = ? ? VGS = -2 V, ID = ? ? VGS = -3 V, ID = ? ? VGS = -4 V, ID = ? ? VGS = -5 V, ID =? ? 27

SUMMARY OF TTC • Y AXIS ID Range: 0 IDSS unit: m. A •

SUMMARY OF TTC • Y AXIS ID Range: 0 IDSS unit: m. A • X AXIS -VGS Range: 0 VGS(off) unit: V • Equation involved Square Law

JFET Basic Structure Characteristics Parameters Forward Transconductance, gm Input Resistance, Rin Biasing

JFET Basic Structure Characteristics Parameters Forward Transconductance, gm Input Resistance, Rin Biasing

JFET Parameters: Forward Transconductance • Forward Transfer Conductance, gm is the changes in drain

JFET Parameters: Forward Transconductance • Forward Transfer Conductance, gm is the changes in drain current (ΔID) based on changes in gate-to-source voltage (ΔVGS) with VDS is constant. • The value is larger at the top of the curve (near VGS=0) but become smaller as you increase VGS (near VGS(off)). 30

 • A data sheet normally gives the value gmo @ gfs, and then

• A data sheet normally gives the value gmo @ gfs, and then we can calculate an approximate value for gm using at any point on the transfer characteristic curve by using: • Unit: Siemens (S) • When the value of gm 0 is not available in data sheet , it can be calculate using this formula: 31

POP-QUIZ 5 Q 5) By refering data sheet for a 2 N 5457 JFET.

POP-QUIZ 5 Q 5) By refering data sheet for a 2 N 5457 JFET. Determine transconductance for VGS = -4 V and find ID at this point. 32

JFET Parameters : Input Resistance, Rin • Since JFET operates with GS-junction reverse-biased for

JFET Parameters : Input Resistance, Rin • Since JFET operates with GS-junction reverse-biased for operation , which makes the input resistance (Rin) becomes so large at the gate. • This high input resistance is one advantage of using JFET over BJT. • This input resistance Rin can be calculated at different VGS using : Where: IGSS = Gate Reverse Current (if not given refer data sheet) • The value of input resistance is absolute value (no sign). 33

POP- QUIZ 6 Calculate input resistance, RIN if IGSS= -2 n. A and VGS=

POP- QUIZ 6 Calculate input resistance, RIN if IGSS= -2 n. A and VGS= -20 V Solution: 34

TAKE HOME QUIZ 3 Q 7) For a 2 N 5459 JFET , determine

TAKE HOME QUIZ 3 Q 7) For a 2 N 5459 JFET , determine the forward transconductance, drain current and input resistance for VGS= -7 V if IGSS= -2 n. A. 35

6. 3. JFET Biasing JFET Basic Structure Self- Bias Characteristics Mid point Bias Parameters

6. 3. JFET Biasing JFET Basic Structure Self- Bias Characteristics Mid point Bias Parameters Gate Bias 1) Circuit Biasing Voltage Divider Bias Current Source Bias 36

SELF- BIAS JFET Bias Circuit Self-Bias Circuit Is = ID Mid point Bias Q

SELF- BIAS JFET Bias Circuit Self-Bias Circuit Is = ID Mid point Bias Q point (VGS, ID) Gate Bias Advantages& Disadvantages Voltage Divider Bias Current Source Bias

JFET Biasing- 1) Self bias • Self-bias is the most common type of biasing

JFET Biasing- 1) Self bias • Self-bias is the most common type of biasing method for JFETs. • JFET must be operated such that the gate-source junction is always reverse biased. • To keep the GS-junction reverse biased: (a). VGS will be -ve for n-channel JFET (b). VGS will be +ve for p-channel JFET. • It can be achieved using self-bias arrangement as shown in figure below. • The gate resistor, RG : not affect the bias because it has essentially no volt drop across it. • Therefore, the gate remains 0 V. • RG only to force the gate to be 0 V and isolate an ac signal from ground in amplifier applications. • Self-biased JFETs: ID = IS for all JFET circuits 38

For n-channel JFET • IS through RS produces a voltage drop, making the Source

For n-channel JFET • IS through RS produces a voltage drop, making the Source +ve with respect to ground. • Since, IS = ID and VG = 0, VS = IDRS. • So: VGS = VG – VS = 0 – IDRS ü (n channel) VGS = -IDRS For p-channel JFET • IS through RS produces a –ve voltage at Source, making the Gate +ve with respect to ground. • Since, IS = ID, and VG = 0, -VS = –IDRS VGS = VG – (– VS ) = 0 – (– IDRS) ü (p channel) VGS = IDRS 39

 • For the drain voltage (VD) with respect to ground is determined as

• For the drain voltage (VD) with respect to ground is determined as follows: KVL Drain to Source: 40

POP- QUIZ 7 Find VDS and VGS if the drain current, ID of approximately

POP- QUIZ 7 Find VDS and VGS if the drain current, ID of approximately 5 m. A is produced. 41

KVL Drain to Source: KVL Gate to Source: 42

KVL Drain to Source: KVL Gate to Source: 42

TAKE HOME QUIZ 4 Determine VD, VS, VDSand VGS when ID = 8 m.

TAKE HOME QUIZ 4 Determine VD, VS, VDSand VGS when ID = 8 m. A. Ans: VS = 3. 12 V VD = 5. 12 V VDS = 2 V VGS = -3. 12 V 43

SELF- BIAS JFET Bias Circuit Self-Bias Circuit Is = ID Mid point Bias Q

SELF- BIAS JFET Bias Circuit Self-Bias Circuit Is = ID Mid point Bias Q point (VGS, ID) Gate Bias Voltage Divider Bias Current Source Bias

Self bias - Q-Point • The basic approach to establishing a JFET bias point

Self bias - Q-Point • The basic approach to establishing a JFET bias point is to determine the ID for a desired value of VGS or vice versa. • For a desired value of VGS, ID can be determined from: (a) Transfer characteristic curve (b) Formula: • Then, calculate the required value of RS using the following relationship. 45

POP- QUIZ 8 ( Using Formula) Determine the value of RS required to self

POP- QUIZ 8 ( Using Formula) Determine the value of RS required to self bias a n channel JFET with IDSS = 10 m. A and VGS(off) = -15 V. VGS is to be -5 V. 46

POP- QUIZ 9(Using Transfer Characteristic Curve) Determine the value of RS required to self

POP- QUIZ 9(Using Transfer Characteristic Curve) Determine the value of RS required to self bias a n channel JFET that has the transfer characteristic curve shown below at VGS= -5 V. Q point: ID (m. A) VGS= -5 V ID= ? ? -VGS(V) 47

Self bias – Biasing-graphical Analysis • The Transfer characteristic curve of a JFET can

Self bias – Biasing-graphical Analysis • The Transfer characteristic curve of a JFET can be use to determine the Q point ( ID and VGS) of self bias circuit. • To determine the Q point: – Make a self-bias DC load line on the graph of Transfer Characteristic given. • First, establish dc load line by: i) calculating VGS when ID=0. ii) calculate VGS when ID=IDSS ID= 0 ID=IDSS. VGS=-IDRS • With 2 points, draw dc load line on the transfer characteristic curve. 48

POP- QUIZ 10 Determine the Q point for the JFET circuit below. 49

POP- QUIZ 10 Determine the Q point for the JFET circuit below. 49

 • First, establish dc load line by: i) calculating VGS when ID=0. ii)

• First, establish dc load line by: i) calculating VGS when ID=0. ii) calculate VGS when ID=IDSS ID= 0 VGS=-IDRS = (0)(470Ω) = 0 V v ID= 0 VGS = 0 V ID=IDSS. VGS=-IDRS = (10 m. A)(470Ω) v ID=IDSS. VGS=- 4. 7 V = - 4. 7 V • With 2 points, draw dc load line on the transfer characteristic curve. 50

 • The point where the line intersect the transfer characteristic curve is the

• The point where the line intersect the transfer characteristic curve is the Q-point of the circuit. 51

TAKE HOME QUIZ 5 Determine the Q point for the JFET circuit below. ID(m.

TAKE HOME QUIZ 5 Determine the Q point for the JFET circuit below. ID(m. A) 470Ω 280Ω -VGS

JFET Bias Circuit Self-Bias Mid point Bias Circuit ID = 0. 5 IDSS Gate

JFET Bias Circuit Self-Bias Mid point Bias Circuit ID = 0. 5 IDSS Gate Bias Q point (VGS, ID) Voltage Divider Bias Current Source Bias

Self bias – Midpoint Bias • Midpoint biasing – It is usually desirable to

Self bias – Midpoint Bias • Midpoint biasing – It is usually desirable to bias a JFET near the midpoint of its transfer characteristic curve (TCC) where ID = 0. 5 IDSS when VGS= VGS(off)/ 3. 4. • Under signal condition, midpoint bias allows the max amount of drain current swing between 0 and IDSS. • Midpoint biasing ID = 0. 5 IDSS and • By selecting VGS = VGS(off) /3. 4 should get a midpoint bias in terms of ID. 54

 • To set the Drain Voltage (VD) at midpoint : (to select a

• To set the Drain Voltage (VD) at midpoint : (to select a value of RD to produce the desired voltage drop. ) • The value of RD needed can be determined by taking half of VDD and dividing it by ID: • RG, it’s value is arbitrarily large to prevent loading on the driving stage in a cascaded amplifier arrangement. 55

Midpoint biasing: ID = 0. 5 IDSS

Midpoint biasing: ID = 0. 5 IDSS

POP- QUIZ 11 By referring datasheet ( 2 N 5457 JFET) , select resistor

POP- QUIZ 11 By referring datasheet ( 2 N 5457 JFET) , select resistor value for RD and RS to set up an approximate midpoint bias. Use minimum datasheet values when given; otherwise, VD should be approximately 6 V(one-half of VDD). 57

Solution: 58

Solution: 58

JFET Bias Circuit Self-Bias Mid point Bias Gate Bias Circuit Voltage Divider Bias Current

JFET Bias Circuit Self-Bias Mid point Bias Gate Bias Circuit Voltage Divider Bias Current Source Bias

JFET Biasing- 2) Gate- bias • Gate supply voltage (-VGG) is used to ensure

JFET Biasing- 2) Gate- bias • Gate supply voltage (-VGG) is used to ensure GS-junction is reversebiased. • Since there is no gate current (IG), there is no voltage dropped across RG. So, VGS = -VGG. • RG to prevent input signal from being shorted to gate supply through low reactance of input coupling capacitor. 60

 • To find ID: • Disadvantage Gate bias does not provide a stable

• To find ID: • Disadvantage Gate bias does not provide a stable Qpoint value of ID from one JFET to another. 61

JFET Bias Circuit Self-Bias Mid point Bias Voltage Divider Bias Gate Bias Circuit Current

JFET Bias Circuit Self-Bias Mid point Bias Voltage Divider Bias Gate Bias Circuit Current Source Bias Q point (VGS, ID)

JFET Biasing- 3) Voltage-Divider bias • The voltage at source, VS of the JFET

JFET Biasing- 3) Voltage-Divider bias • The voltage at source, VS of the JFET must be more +ve than the voltage at gate, VG in order to keep the GS-junction reverse bias. Since ID=IS. • Source voltage: • Gate voltage: • Gate-to-source voltage: N channel JFET VDB • Source voltage: • Drain current: 63

POP- QUIZ 12 Determine ID and VGS for the JFET with voltage divider bias

POP- QUIZ 12 Determine ID and VGS for the JFET with voltage divider bias below, given that for this particular JFET the parameter values are such that VD = 7 V. 64

Solution: Determine ID and VGS 65

Solution: Determine ID and VGS 65

TAKE HOME QUIZ 6 Given that VD = 6 V, determine the ID and

TAKE HOME QUIZ 6 Given that VD = 6 V, determine the ID and VGS. Ans: ID = 2. 353 m. A VGS = -4. 290 V 66

Voltage Divider Bias – Biasing-graphical(Q point) • By using the transfer characteristic curve to

Voltage Divider Bias – Biasing-graphical(Q point) • By using the transfer characteristic curve to determine the approximate Q-point, we must establish the two points for the DC load line. 1 st point: ID= 0 VGS=VG-VS VS = ID RS = (0)(RS) VGS=VG-VS = VG – 0= VG v ID= 0 VGS = VG 2 nd point: VGS=0 VGS=ID = VG - VGs = VG RS v VGS=0 ID=VG RS . 67

 • The point at which the DC load line intersect with transfer characteristic

• The point at which the DC load line intersect with transfer characteristic curve is Q-point. 68

POP- QUIZ 13 Determine the approximate Q-point for the JFET with the voltage-divider bias

POP- QUIZ 13 Determine the approximate Q-point for the JFET with the voltage-divider bias below and also given the transfer characteristic curve. 69

Solution: 1 st point: ID= 0 VGS=VG-VS VS = ID RS = (0)(RS) VGS=VG-VS

Solution: 1 st point: ID= 0 VGS=VG-VS VS = ID RS = (0)(RS) VGS=VG-VS = VG – 0= VG v ID= 0 VGS = VG VGS=0 ID = VG - VGs = VG RS v VGS=0 ID=VG RS . 2 nd point: For 1 st point: 2 nd point: 70

1 st point: 2 nd point: ID= 0 VGS=VG v ID= 0 VGS =

1 st point: 2 nd point: ID= 0 VGS=VG v ID= 0 VGS = VGS=0 ID = VG - VGs = VG RS v VGS=0 ID=VG = RS . Ans: 71

TAKE HOME QUIZ 7 Determine the approximate Q-point for the JFET with the voltage-divider

TAKE HOME QUIZ 7 Determine the approximate Q-point for the JFET with the voltage-divider bias below and also given the transfer characteristic curve. 1. 2 kΩ

JFET Bias Circuit Self-Bias Mid point Bias Gate Bias Voltage Divider Bias Current Source

JFET Bias Circuit Self-Bias Mid point Bias Gate Bias Voltage Divider Bias Current Source Bias Circuit

JFET Biasing- 3) Current Source - Bias • Current source bias: for increasing Q

JFET Biasing- 3) Current Source - Bias • Current source bias: for increasing Q -point stability of self biased JFET by making value of ID independently of VGS • It can be accomplished by using constant current source in series with JFET source. • From figure, BJT acts as constant – current because IE is constant if VEE>>VBE. • FET also can be used as constant current source. IE = VEE - VBE = VEE RE • ID= IE ( ID remains constant for any transfer characteristic curve as indicated by the horizontal line ID= IE 74

Advantage • provide the most stable Q-point value of ID. Disadvantage • circuit complexity

Advantage • provide the most stable Q-point value of ID. Disadvantage • circuit complexity makes it undesirable for most applications. 75