EET 203 MICROCONTROLLER SYSTEMS DESIGN ADC Programming Objectives

EET 203 MICROCONTROLLER SYSTEMS DESIGN ADC Programming

Objectives Describe the ADC basic operation and setting in PIC Explain the process of data acquisition using ADC Program the PIC 16’s ADC in C language Sensor interfacing

Introduction to ADC Analog-to-digital (ADC) converters are among the most widely used devices for data acquisition. Digital Computer use binary (discrete) values, but in the physical world is analog (continuous) values. Examples of physical quantities: Temperature, Humidity, Pressure, Velocity A physical quantity is converted to electrical (Voltage, Current) signals using a device called transducer (also referred as sensors). Sensors for temperature, velocity, pressure, light etc. produce an output that is voltage (or current). Microcontroller read digital values only. Therefore, ADC converter is needed to translate (convert) the analog signals to digital numbers, so that the microcontroller can read and process them

Introduction to ADC (Cont’d) Microcontroller Connection to Sensor via ADC An 8 -bit ADC Block

ADC Characteristics Some of the major characteristics of ADC: � Resolution � Conversion time � Vref � Digital data output � Parallel vs. Serial ADC � Start conversion and end-of-conversion signals

ADC Resolution ADC has n-bit resolution, where n = 8, 10, 12, 16 or even 24 bits. The higher-resolution ADC provides a smaller step size, where step size is the smallest change that can be discerned by an ADC. Can control the step size with the help of Vref. Table 1: Resolution vs. Step Size for ADC n-bit No. of steps Step size (m. V) 8 28 = 256 5/256 = 19. 53 10 210 = 1024 5/1024 = 4. 88 12 212 = 4096 5/4096 = 1. 2 16 216 = 65, 536 5/65, 536 = 0. 076 Assuming VREF = 5 V * Step Size (Resolution): is the smallest change that can be discerned by an AD

Conversion time Conversion time, TAD is defined as the time it takes the ADC to convert the analog input to a digital (binary) number. The conversion time is dictated by the clock source connected to the ADC (OCSs pins). Explained later…

ADC Reference Voltage (Vref) Vref is an input voltage used for the reference voltage. The voltage connected to this pin, along with the resolution of the ADC chip, dictate the step size. In some applications, we need the differential reference voltage where Vref = Vref(+) – Vref(-). � Vref(-) pin is connected to ground, Vref(+) pin is used as the Vref. � Example: If we need the analog input to be 0 to 5 V, Vref is connected to 5 V For an 8 -bit ADC, the step size is Vref/256. � If Vref = 4 V, the step size is 4 V/256 = 15. 62 m. V. � If need a step size of 10 m. V, then Vref = 256 x 10 m. V = 2. 56 V. For the 10 -bit ADC, the step size is Vref/1024. � If Vref = 5 V, the step size is 5 V/1024 = 4. 88 m. V. 28 = 256 210 = 1024

ADC Reference Voltage (Vref) Table 2: Vref relation to Vin Range for an 10 -bit ADC Vref (V) Vin (V) Step size (m. V) 5. 00 0 to 5 5/1024 = 4. 88 4. 096 0 to 4. 096/1024 = 4 3. 0 0 to 3 3/1024 = 2. 93 2. 56 0 to 2. 56/1024 = 2. 5 2. 048 1. 28 1. 024 0 to 2. 048 0 to 1. 28 0 to 1. 024 2. 048/1024 = 2 1/1024 = 1. 25 1. 024/1. 024 = 1

Digital Data Output Digital data output: � 8 -bit ADC: D 0 -D 7 � 10 -bit ADC: D 0 -D 9 To calculate output voltage: Dout = Vin / Step Size Digital data output (in decimal): 8 -bit (D 0 -D 7)= 256 10 -bit (D 0 -D 9) = 1024 Analog Input Voltage Resolution: the smallest change 8 -bit: Vref/256 OR 10 -bit: Vref/1024 Example: Vref = 2. 56, Vin = 1. 7 V. Calculate the D 0 - D 9 output? Solution: Step Size = 2. 56/1024 = 2. 5 m. V Dout = 1. 7/2. 5 m. V = 680 (Decimal)

Parallel versus Serial ADC 0848 Parallel ADC Block Diagram MAX 1112 Serial ADC Block Diagram

Start Conversion (SC) and End-of-Conversion (EOC) Signals Multiple analog input channels and a single digital output register makes it necessary for SC and EOC signals. When SC is activated, the ADC starts converting the analog input value of Vin to an n-bit digital number. The amount of time it takes to convert varies depending on the conversion method as was explained earlier. When the data conversion is complete, the EOC signal notifies the CPU that the converted data is ready to be picked up. Steps for Data Conversion by ADC: 1. 2. Select a channel Activate the start conversion (SC) to start the conversion of analog input. 3. Keep monitoring the end-of-conversion (EOC) signal. 4. After the EOC has been activated, read data out of the ADC chip.

PIC 16 F 877 A ADC Features It has 8 analog input channels: AN 0 – AN 7 (RA 0 – RA 7) 10 -bit A/D Module High-voltage reference and low-voltage reference input that is software selectable to some combination of VDD, VSS, RA 2 or RA 3. � � Option using Vdd (Vcc), or an external voltage source for Vref Differential Vref voltage using Vref(+) and Vref(-) pins. Conversion time TAD is dictated by Fosc (OSCs pins). Cannot be shorter than 1. 6 μs.

A/D Module Block Diagram

PIC 16 F 877 A ADC Features(cont’d) Converted values are stored in ADRESH: ADRESL registers – 16 bit � � ADRESH: A/D Result High Register – 8 bit ADRESL: A/D Result Low Register – 8 bit ADC data out is only 10 bits wide. Therefore 6 bits of 16 bits are unused – option making either upper 6 bits or lower 6 bits unused. Explained later

Registers/Bits Associated With A/D

ADC: Important Registers A/D Control 0 (ADCON 0) Register � Controls the operation of the A/D module A/D Control 1 (ADCON 1) Register � Configures the functions of the port pins � The port pins can be configured as analog inputs or digital I/O (RA 3 can also be the voltage reference). A/D Result Register Pair – ADRESH: ADRESL Registers Refer PIC 16 F 87 XA Data Sheet for more details.

ADCON 0 Register

ADCON 1 Register

ADCON 1 Register Note: On any device Reset, the port pins that are multiplexed with analog functions (ANx) are forced to be an analog input

A/D Result Register Pair – ADRESH: ADRESL Registers (continued) The ADRESH: ADRESL register pair is the location where the 10 -bit A/D result is loaded at the completion of the A/D conversion. This register pair is 16 bits wide. The A/D module gives the flexibility to left or right justify the 10 -bit result in the 16 -bit result register. The A/D Format Select bit ADFM (ADCON 1<7>) controls this justification. The extra bits are loaded with ‘ 0’s. When an A/D result will not overwrite these locations (A/D disable), these registers may be used as two general purpose 8 -bit registers. A/D Result Justification

ADC ADFM Bit (ADCON 1<7>) ADFM Bit and ADRESx Registers

A/D Acquisition Requirements The analog input charges a sample and hold capacitor. The output of the sample and hold capacitor is the input into the converter. For the A/D converter to meet its specified accuracy, the charge holding capacitor (CHOLD) must be allowed to fully charge to the input channel voltage level. The converter then generates a digital result of this analog level via successive approximation. After the analog input channel is selected (changed), this acquisition must be done before the conversion can be started. Tacq minimum duration: Typical value = 15 μs. After acquisition time Tacq has elapsed, A/D conversion can be started.

ADC Conversion Time The A/D conversion time per bit is defined as TAD. The A/D conversion requires a minimum 12 TAD per 10 bit conversion. The seven possible options of clock source for TAD: • 2 TOSC • 4 TOSC • 8 TOS • 16 TOSC • 32 TOSC • 64 TOSC • Internal A/D module RC oscillator (2 - 6 μs) * TOSC = 1/Fosc; where Fosc=speed of crystal frequency For correct A/D conversions, the A/D conversion clock (TAD) must be selected to ensure a minimum TAD time of 1. 6 μs.

ADC Conversion Time (continued) When A/D conversion is complete: � the result is loaded into ADRESH: ADRESL register pair � The GO/DONE* bit (ADCON 0<2>) is cleared � The A/D interrupt flag bit ADIF is set After the A/D module has been configured as desired, the selected channel must be acquired before the conversion is started. After acquisition time Tacq has elapsed, A/D conversion can be started.

A PIC is connected to 10 MHz crystal oscillator. Calculate the conversion time for all options of ADCS bits in both the ADCON 0 and ADCON 1 registers. Example 1 For 2 TOSC: TAD = 2 x (1/10 MHz) = 200 ns Invalid because it is faster than 1. 6 μs. For 4 TOSC: TAD = 4 x (1/10 MHz) = 400 ns Invalid because it is faster than 1. 6 μs. For 8 TOSC: TAD = 8 x (1/10 MHz) = 800 ns Invalid because it is faster than 1. 6 μs. For 16 TOSC: TAD = 16 x (1/10 MHz) = 1. 6 μs The conversion time = 12 TAD = 12 x 1. 6 μs = 19. 2 μs For 32 TOSC: TAD = 32 x (1/10 MHz) = 3. 2 μs The conversion time = 12 TAD = 12 x 3. 2 μs = 38. 4 μs For 64 TOSC: TAD = 64 x (1/10 MHz) = 6. 4 μs The conversion time = 12 TAD = 12 x 6. 4 μs = 76. 8 μs Note: For 4 TOSC, 16 TOSC, and 64 TOSC selections, we must use the ADSC 2 bit in ADCON 1 register, in addition to ADCS bits in ADCON 0 register.

Example 2 A PIC is connected to 4 MHz crystal oscillator. Calculate the conversion time if we want to use only the ADCS bits of ADCON 0 register. The options for the conversion clock source available in ADCON 0 register: For 2 TOSC: TAD = 2 x (1/4 MHz) = 400 ns Invalid because it is faster than 1. 6 μs. For 8 TOSC: TAD = 8 x (1/4 MHz) = 2 μs The conversion time = 12 TAD = 12 x 2 μs = 24 μs For 32 TOSC: TAD = 32 x (1/4 MHz) = 8 μs The conversion time = 12 TAD = 12 x 8 μs = 96 μs

ADC Conversion Time (continued) TAD vs. Maximum Device Operating Frequencies (Standard Devices (F))

Configuring Analog Port Pins The ADCON 1 and TRIS registers control the operation of A/D port pins. The analog input channels must have their corresponding TRIS bits selected as inputs. If the TRIS bit is cleared (output), the digital output level (VOH or VOL) will be converted. The A/D operation is independent of the state of the CHS 2: CHS 0 bits and the TRIS bits.

A/D Conversions Clearing the GO/DONE* bit during a conversion will abort the current conversion. The A/D Result register pair will NOT be updated with the partially completed A/D conversion sample. That is, the ADRESH: ADRESL registers will continue to contain the value of the last completed conversion (or the last value written to the ADRESH: ADRESL registers). After the A/D conversion is aborted, the next acquisition on the selected channel is automatically started. The GO/DONE* bit can then be set to start the conversion. Note: The GO/DONE* bit should NOT be set in the same instruction that turns on the A/D.

A/D Conversions (continued) A/D Conversion TAD Cycles � after the GO bit is set, the first time segment has a minimum of TCY and a maximum of TAD.

A/D Operation During Sleep The A/D module can operate during Sleep mode. This requires that the A/D clock source be set to RC (ADCS 1: ADCS 0 = 11). When the RC clock source is selected, the A/D module waits one instruction cycle before starting the conversion. This allows the SLEEP instruction to be executed which eliminates all digital switching noise from the conversion. When the conversion is completed, the GO/DONE* bit will be cleared and the result loaded into the ADRES register. If the A/D interrupt is enabled, the device will wake-up from Sleep. If the A/D interrupt is not enabled, the A/D module will then be turned off, although the ADON bit will remain set.

A/D Operation During Sleep (continued) When the A/D clock source is another clock option (not RC), a SLEEP instruction will cause the present conversion to be aborted and the A/D module to be turned off, though the ADON bit will remain set. Turning off the A/D places the A/D module in its lowest current consumption state. Note: For the A/D module to operate in Sleep, the A/D clock source must be set to RC (ADCS 1: ADCS 0 = 11). To allow the conversion to occur during Sleep, ensure the SLEEP instruction immediately follows the instruction that sets the GO/DONE bit.

Effects of a Reset A device Reset forces all registers to their Reset state. This forces the A/D module to be turned off and any conversion is aborted. All A/D input pins are configured as analog inputs. The value that is in the ADRESH: ADRESL registers is not modified for a Power-on Reset. The ADRESH: ADRESL registers will contain unknown data after a Power-on Reset.

Steps To Do A/D Conversion 1. 2. 3. Configure the A/D Module: 1. Configure analog pins, voltage reference and digital I/O (ADCON 1) 2. Select A/D input channel (ADCON 0) 3. Select A/D conversion clock (ADCON 0) 4. Turn on A/D module (ADCON 0) Configure A/D interrupt (if desired): 1. Clear ADIF bit 2. Set ADIE bit 3. Set PEIE bit 4. Set GIE bit Wait the required acquisition time. A minimum wait of 2 TAD is

Steps To Do A/D Conversion 4. 5. 6. 7. Start conversion: 1. Set GO/DONE* bit (ADCON 0) 2. A minimum 12 TAD per 10 -bit is required for conversion. Wait for A/D conversion to complete by either: 1. Polling for the GO/DONE* bit to be cleared (interrupts disabled); OR 2. Waiting for the A/D interrupt Read A/D Result register pair (ADRESH: ADRESL), clear bit ADIF if required For the next conversion, go to Step 1 or Step 2 as required (if another channel is selected).

Steps in ADC Programming using Polling 1. 2. 3. 4. 5. 6. 7. 8. 9. Turn ON ADC Module (disabled upon power-on reset) ADCON 0 bits. ADON=1 Make the ADC channel pin as input pin. Select voltage reference and ADC input channels. Use ADCON 0 and ADCON 1 register. Select conversion speed. Use ADCON 0 and ADCON 1 register. Wait for required acquisition time. Activate start conversion (SC) bit of GO/DONE*. Wait for conversion to be completed by polling the end-ofconversion (EOC) of GO/DONE* bit. After GO/DONE*=0, read ADRESL and ADRESH register to get digital data output. Go back to Step 5.

Steps in ADC Programming using Interrupts Need to set HIGH the ADIE (A/D interrupt enable) flag. If ADIE=1, then upon completion of conversion, ADIF (A/D interrupt flag) becomes HIGH, which will force CPU to jump to read binary outputs. Interrupt Flag Bit Register Enable Bit Register ADIF (ADC) ADIF PIR 1 ADIE PIE 1 ADC Interrupt Flag Bits and Associated Registers Refer the previous slides on “Steps To Do A/D Conversion”.

Example 3 – Lab Exercise The PIC is connected to 20 MHz crystal oscillator. 64 TOSC will be used for the conversion clock source. This program gets data (10 -bit result) from Channel 0 (RA 0) of ADC and the digital value will be represented by LEDs connected to PORTB (RB 7 and RB 6) and PORTD. When bit-9 and bit-8 of 10 -bit results are both ‘ 1’, the buzzer will on.

Example 3 // PIC configuration void adc_initialize(void) // Initialize the ADC module. { // ADFM (ADCON 1<7>) result to be LEFT justified, will take as 10 -bit ADC // ADCS 2 (ADCON 1<6>) A/D Conversion Clock = FOSC/64. // PCFG 3: 0 (ADCON 1<3: 0>) Set AN 0 only as analog input, others AN as digital pin. Use Vdd and Vss for //Vref+ and Vref-. Refer Data Sheet ADCON 1 = 0 b 01001110; // ADCS 1: 0 (ADCON 0<7: 6>) A/D Conversion Clock = FOSC/64. // CHS 2: 0 (ADCON 0<5: 3>) Select the ADC channel, PTK can only read AN 0 // GO_DONE* (ADCON 0<2>) Do not start conversion // ADON (ADCON 0<0>) Turn Off ADC module by default ADCON 0 = 0 b 10000000; }

void main(void) { TRISA = 0 x 01; // AN 0 as analog input for ADC TRISB = 0 b 00111111; // send 2 LSB bits of 10 -bit result A/D TRISD = 0 x 00; // send 8 MSB bits of 10 -bit result A/D PORTB = 0 x 00; // off LED in Port. B. High PORTD = 0 x 00; // off LED in Port. D TRISC = 0 x 00; // for buzzer RC 2 = 0; // off buzzer TRISE = 0 x 00; // for 7 -segment (Latch Enable*) PORTE = 0 b 111; // disable Seg 1 dan Seg 2 adc_initialize(); while(1) // Endless loop { ADCON 0 bits. ADON=1; // Turn On ADC module // Delay 1 m. S to fully charge the holding capacitor in the ADC module. __delay_us(15); // acquisition time. Minimum 2 x. TAD=6. 4 us, typical value=15 us // Start the conversion and wait for it to complete. ADCON 0 bits. GO=1; // ADCON 0<2>; GO/DONE*=1: A/D conversion in progress __delay_us(40); // A/D conversion time: TAD/1 -bit=3. 2 us, minimum 12 x. TAD for 10 bit=38. 4 us

while (ADCONbits. GO==1) also can be used if (ADCON 0 bits. GO==0); // wait for completion { // Get 10 -bit results of A/D conversion PORTD = ADRESH; // 8 MSBs or A/D result are moved to Port D PORTB = ADRESL; // 2 LSBs of A/D result are moved to bits RB 6 and RB 7 if (PORTD>0 x. C 0) // Pt. D=0 b 11 xxxxxx (2 MSBs of A/D result are both 1) { Buzzer=1; // buzzer on when Port. D > 0 x. C 0 (192 Decimal) } else { Buzzer=0; // buzzer off } }

ADC Sensor Interfacing Gas Sensor Temperature Sensor Sonar Sensor Humidity Sensor

Temperature Sensor Transducers convert physical data such as temperature, light intensity, flow and speed to electrical signals. The output of transducer is in form of voltage, current, resistance or capacitance. For example, temperature is converted to electrical signals using thermistor. A thermistor responds to temperature change by changing resistance, but its response is not linear. LM 35 (Linear temperature sensor): 1) Precision integrated-circuit temperature sensor 2) Output voltage is linearly proportional to the Celcius 3) Requires no external calibration (Internally calibration) 4) Output: 10 m. V for each degree

ADC Sensor Interfacing (Cont’d) ADC: 10 -bit resolution, max 1024 steps 10 m. V = 1 degree (Minimum) 20 m. V = 2 degree. . . 1000 m. V = 100 degree (Maximum) How to set Vref? ? 5 V Step Size = 4. 8 m. V Vin (max) = 5 V 1. 024 Step Size = 1 m. V Vin (max) = 1. 024 V Vref = ? ? ? Which one suitable?

END OF CHAPTER “Things are only impossible until they're not”