EE 5900 Advanced Embedded System For Smart Infrastructure

EE 5900 Advanced Embedded System For Smart Infrastructure Energy Efficient Scheduling 1

Introduction • Energy consumption is an important issue in embedded systems. – Mobile and portable devices. – Laptops, PDAs. – Mobile and Intelligent systems: Digital camcorders, cellular phones, and portable medical devices. • A typical networked embedded system consists of – Computing subsystem - driven by an embedded processor operated by a RTOS. – Communication subsystem - consists of a radio chipset driven by a firmware. A typical Embedded System Battery Computing Subsystem (Driven by RTOS) Micorprocessor, Digital Signal Processor (DSP) Communication Subsystem (Driven by Firmware) Radio, RF amplifiers, A-to-D & D-to-A ckts 2

Important Facts (1) • High performance is needed only for a small fraction of time, while for the rest of time, a low-performance, a low-power processor would suffice. Peak Computing Rate is needed Work load Average rate would suffice Time 3

Important Facts (2) • Processors are based on CMOS technology where dynamic power is the bottleneck Dynamic power (due to switching activity) • P α V 2. f • Vα f V: voltage; P: power; E: Energy • E = P * Tcc • Ei = K. cci. f 2 Tcc = CC/f Where Tcc : execution time; CCi : # clock cycles of task Ti. f : frequency at which Ti is run. 4

Variable Voltage Processors • Modern processors operate at multiple frequency levels. – Crusoe Processor: Transmeta Corporation – Power. Now! Technology: AMD – Intel XScale: Intel • Higher the frequency level higher the energy consumption 5

Crusoe processor • What is the power consumption of a Crusoe processor? [1] The extremely low power consumption delivered on multimedia applications is due to a new feature called Long. Run power management. Long. Run has the distinct ability to analyze the application workload dynamically and to adjust continuously the processor's speed (MHz) and voltage to provide the necessary performance. This new feature promises to extend the battery life of all applications, most specifically those requiring the constant attention of the processor. This is a dramatic departure from today's ultra-light PCs, which are incapable of delivering over one and a half or two hours of runtime for DVD movies. 6

Dynamic Voltage Scaling (DVS) • DVS scales the operating voltage of the processor along with the frequency. • Since energy is proportional to f 2 , DVS can potentially provide significant energy savings through frequency and voltage scaling. 7

Case study (i. Phone 5) • i. Phone 5’s power management system Multiprocessor (A 6) Memories Computation System (operated by RTOS) RF Modem Power amplifier Computation System (operated by Firmware) DC/DC down converter Battery 3. 8 V - 5. 45 Wh 1440 m. Ah LDO (Low Drop Out) Power management ICs Why we need these? Internal elements needs various types of voltages. -. DC/DC converter provides large capacity power. -. LDO provides small capacity power. 8

Case study (smart phones) • Practical multi-core processors Device Chip maker Processor name Frequency # cores i. Phone 5 Apple A 6 1. 02 GHz 2 Galaxy S III Samsung Exynos 4412 1. 44 GHz 4 Motorola RAZR Ti OMAP 4430 1. 2 GHz 2 HTC one S Qualcomm MSM 8260 A 1. 2 GHz 2 Asus transformer NVIDIA Tegra 3 1. 3 GHz 4 New i. Pad Apple A 5 X 1 GHz 2 • Contemporary multi-core processors have more than 2 cores at about 1 GHz. 9

Simple DVS-Scheme DVS Task queue Next task Over loaded system f=F Under loaded f = F/2 10

DVS-example • Consider a task with a computation time 20 units. • Energy of Ti without DVS: Time taken = t 1 (say) – E 1 = K * 20 * F 2. • Energy of Ti with DVS: – E 2 = K * 20 * (F/2)2. • Clearly, E 2 = (E 1)/4 Time taken = t 2 = 2 * t 1 Therefore, if we reduce the frequency we save energy but, we spend more time in performing the same computation 11

Energy-Time Tradeoffs 60 40 20 Energy Savings 10 Time 12

Simple DVS scheme handling RT-task • Consider a real-time task T 1 = (20, 30) • Applying the simple DVS scheme – T 1 runs at maximum frequency (F) and meets the deadline with no energy savings – T 1 runs at half the maximum frequency (F/2) and completes at time = 40 thereby missing its deadline 13

Simple DVS scheme handling RT-task Frequency No DVS F 20@F 20 30 time Frequency DVS: Low workload F F/2 Inference: DVS cannot be blindly applied to real-time embedded systems 20@(F/2) 20 40 time 14

Energy aware scheduling in RT Systems § Objectives § Minimizing energy consumption § Meeting the deadlines 15

Real Time - DVS schemes Ø The RT-DVS algorithms can be broadly classified based on the granularity at which voltage scheduling is performed as follows q. Inter-task DVS scheme: Voltage scheduling is done on a task by task basis. T 1 T 3 T 2 Voltage scheduling points q. Intra-task DVS scheme: Voltage scheduling is done within a task boundary T 1 … …T 1 T 2… T 3 …T 2 16

Inter-task EDF • Static voltage scaling EDF • Cycle conserving RT-DVS 17

Static Voltage Scaling EDF: Motivation Pre-run schedule with holes Next arrival of T 1 WCi = worst case computation time @ Fmax wc 1 wc 2 wc 3 wc 4 Holes in the pre-run schedule imply: EDF Test: ∑(wci/pi) < 1 at frequency = Fmax In other words, whenever ∑(wci/pi) < 1 there are holes in the EDF schedule 18

Static Voltage Scaling EDF: exploiting holes Pre-run schedule with holes Next arrival of T 1 WCi = worst case computation time @ Fmax wc 1 wc 2 wc 3 wc 4 Processor typically idles during holes. Instead, the holes can be exploited to slowdown the processor to save energy 19

Static Voltage Scaling EDF Next arrival of T 1 wc 2 K*wc 1 wc 3 K *wc 2 wc 4 K * wc 3 K * wc 4 EDF Test: ∑(wci/pi) < 1 at maximum frequency = Fmax Static-VS EDF Test: K* [∑(wci/pi)] = 1 at frequency = Fmax/K 20

Static voltage scaling: Example • Task set: T 1 = (1, 4) and T 2 = (2, 8) • U = 1/4 + 2/8 = 0. 5 (< 1) @ Fmax • What is the “k” at which the task set is still schedulable @ (Fmax / k): – Let K = x – U = (1*x)/4 + (2*x)/8 = x*(0. 5) = 1 – X = 2, that is k = 2 – Therefore, we can operate at f = Fmax / 2 and still meet the deadlines 21

Static voltage scaling: Example Frequency Task set: T 1 = (1, 4) and T 2 = (2, 8) U = 1/4 + 2/8 = 0. 5 (< 1) @ Fmax Fm 0 1 3 4 5 8 Time Finding the right frequency scaling parameter (say, k) U = (1*k)/4 + (2*k)/8 = 0. 5*k = 1 @ (Fmax/k) This gives, k = 2. Therefore, operating frequency = F max/2 22

Static voltage scaling: Example Frequency Modified Task set @ (Fmax/2): T 1 = (2, 4) and T 2 = (4, 8) U = 2/4 + 4/8 = 1 @ (Fmax/2) Fm 0 Frequency Energy consumption: 1*F^2 + 2*F^2 = 3 F^2 1 3 4 5 8 Time Energy consumption: 1*(F/2)^2 + 2*(F/2)^2 = (¾)F^2 Fm Fm / 2 0 2 6 8 Time 23

What if Ci < WCi ? Actual computation time K*c 1 K *c 2 K * c 3 Next arrival of T 1 K * c 4 More holes left unexploited 24

What if Ci < WCi ? Actual computation time Next arrival of T 1 Task T 1 completes K*c 1 K *wc 2 K * wc 3 K * wc 4 Hole of size = (wc 1 – c 1) Slow down all these tasks proportionally 25

What if Ci < WCi ? (contd. . ) Next arrival of T 1 K*c 1 K’ *wc 2 K’ * wc 3 K’ * wc 4 CPU Cycles are conserved by slowing down the remaining tasks 26

Cycle conserving EDF: Example • Task set: T 1 = (3, 6) and T 2 = (6, 12) • U = 3/6 + 6/12 = 1 @ Fmax • What is the “k” at which the task set is still schedulable @ (Fmax / k): – Let K = x – U = (3*x)/6 + (6*x)/12 = x*(1. 0) = 1 – X = 1, that is k = 1 – Therefore, we should operate at f = Fmax in order to meet all the deadlines 27

Cycle conserving EDF: Example Frequency Task set @ (Fmax): T 1 = (3, 6) and T 2 = (6, 12) U = 3/6 + 6/12 = 1 @ (Fmax) Fm T 1 0 Frequency Task T 1 just completes in one unit creating holes 1 T 2 3 T 1 9 6 12 Time Fm T 1 0 T 2 1 3 6 T 1 9 28

Cycle conserving EDF: Example Frequency Task set @ (Fmax): T 1 = (3, 6) and T 2 = (6, 12) U = 3/6 + 6/12 = 1 @ (Fmax) Fm T 1 Frequency 0 1 T 2 3 New utilization = 1/6 + 6/12 = 0. 67 Finding the right “k” 1/6 + (6*k)/12 = 1 K = 5/3 New freq = (3/5) Fmax 9 6 12 Task T 1 just completes in one unit creating holes Fm T 1 0 1 T 2 3 6 T 1 9 Time 12 Time 29

Intra Task Energy Management • Intra-task DVS: adjusts the voltage and clock speed within a task. • Identifies the slack time generated within a task due to workload variation. • Application code is preprocessed to enable the run-time clock/voltage adjustment. 30

Intra-task DVS B 1 Intra-task RT-DVS Voltage scheduling points 20 üIntra-task DVS algorithms typically work with the control flow graph (CFG) of the real-time programs. üEach node in the CFG denotes a basic block of computation. B 2 20 ü The edges in the CFG indicate the control dependency between the blocks. üObjective is to assign proper clock frequency to each of the basic blocks so as to minimize the total energy consumption while meeting the task deadline. Different paths P 1: B 1, B 2. P 2: B 1, B 3, B 4. P 3: B 1, B 3, B 5. B 3 B 4 10 10 B 5 150 Deadline = 200 31

Simple Intra-task DVS: example B 1 Fmax 20 40@Fmax 40 B 2 20 B 3 10 Fmax Deadline = 40 30@Fmax 20 30 40 At time = 20, We know the exact branch 32

Simple Intra-task DVS: example B 1 Fmax 20 40@Fmax 40 B 2 20 B 3 10 Fmax Deadline = 40 20 10@(Fmax/2) 20 40 At time = 20, We know the exact branch 33

Worst Case Execution Time (WCET) based scheme F 1 =[ 180/(200 – t) * Fm] B 1 [180] 20 F 2 =[ 20/(200 – t) * Fm] [20] F 3 =[ 160/(200 – t) * Fm] B 2 20 B 3 [160] 10 F 5 =[ 150/(200 – t)* Fm] F 4 =[ 10/(200 – t)* Fm] Different paths [10] B 4 10 P 1: B 1, B 2. B 5 [150] 150 P 2: B 1, B 3, B 4. P 3: B 1, B 3, B 5. t = current time Deadline = 200 34

Summary • DVS schemes can significantly reduce energy in embedded systems. 35