ECE 232 Hardware Organization and Design Lecture 2

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ECE 232 Hardware Organization and Design Lecture 2 Computer Organization - basics Maciej Ciesielski

ECE 232 Hardware Organization and Design Lecture 2 Computer Organization - basics Maciej Ciesielski www. ecs. umass. edu/ece/labs/vlsicad/ece 232/spr 2002/index_232. html ECE 232 L 2 Basics. 1 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Outline ° What is Computer Architecture ° Five components of a Computer • Stored

Outline ° What is Computer Architecture ° Five components of a Computer • Stored program concept • Von Neumann vs Harvard architecture ° Basic data and control flow ° Instruction set architecture • Addressing classes, modes • Instruction formats • Typical operations ° Example organization ECE 232 L 2 Basics. 2 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Computer Organization w ° Capabilities and performance characteristics of principal Functional Units (FU) •

Computer Organization w ° Capabilities and performance characteristics of principal Functional Units (FU) • (Registers, ALU, Shifters, Logic Units, . . . ) ie V s ' er n sig e ic D l e ev L A IS g Lo nn ec t ° Ways in which these components are interconnected rco ° Information flows between components nd sa FU ° Choreography of FUs to realize the ISA Int e ° Logic and means by which such information flow is controlled. ° Register Transfer Level (RTL) description ECE 232 L 2 Basics. 3 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

What is “Computer Architecture”? Application Operating System Compiler Instr. Set Proc. Firmware I/O system

What is “Computer Architecture”? Application Operating System Compiler Instr. Set Proc. Firmware I/O system Instruction Set Architecture Datapath & Control Digital Design Circuit Design Layout ° Coordination of many levels of abstraction ° Under a rapidly changing set of forces ° Design, Measurement, and Evaluation ECE 232 L 2 Basics. 4 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Forces on Computer Architecture Technology Programming Languages Applications Computer Architecture Operating Systems ECE 232

Forces on Computer Architecture Technology Programming Languages Applications Computer Architecture Operating Systems ECE 232 L 2 Basics. 5 Adapted from Patterson 97 ©UCB History Copyright 1998 Morgan Kaufmann Publishers

Technology DRAM chip capacity Microprocessor Logic Density DRAM Year Size 1980 1983 1986 1989

Technology DRAM chip capacity Microprocessor Logic Density DRAM Year Size 1980 1983 1986 1989 1992 1996 1999 2002 64 Kb 256 Kb 1 Mb 4 Mb 16 Mb 64 Mb 256 Mb 1 Gb+ ° In ~1985 the single chip processor (32 bit) and the single board computer emerged • => workstations, personal computers, multiprocessors have been riding this wave since ECE 232 L 2 Basics. 6 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Technology dramatic change ° Moore’s Law: • Chip density (transistors) doubles every 18 months

Technology dramatic change ° Moore’s Law: • Chip density (transistors) doubles every 18 months ° Processor • logic capacity: about 30% per year • clock rate: about 20% per year ° Memory • DRAM capacity: about 60% per year (4 x every 3 years) • Memory speed: about 10% per year • Cost per bit: improves about 25% per year ° Disk • capacity: about 60% per year ECE 232 L 2 Basics. 7 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Processor Performance (SPEC) performance now improves 50% per year (2 x every 1. 5

Processor Performance (SPEC) performance now improves 50% per year (2 x every 1. 5 years) RISC introduction Did RISC win the technology battle and lose the market war? ECE 232 L 2 Basics. 8 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Levels of Representation temp = v[k]; High Level Language Program v[k] = v[k+1]; v[k+1]

Levels of Representation temp = v[k]; High Level Language Program v[k] = v[k+1]; v[k+1] = temp; Compiler lw $15, lw $16, sw $15, Assembly Language Program Assembler Machine Language Program 0000 1010 1100 0101 1001 1111 0110 1000 1100 0101 1010 0000 0($2) 4($2) 0110 1000 1111 1001 1010 0000 0101 1100 1111 1000 0110 0101 1100 0000 1010 1000 0110 1001 1111 Machine Interpretation Control Signal Specification ALUOP[0: 3] <= Inst. Reg[9: 11] & MASK ° ° ECE 232 L 2 Basics. 9 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Computer Organization • Five basic components organized in levels Computer Processor ECE 232 L

Computer Organization • Five basic components organized in levels Computer Processor ECE 232 L 2 Basics. 10 Memory Devices Control Input Datapath Output Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Basic components of a Computer ° All computers consist of five components • Processor:

Basic components of a Computer ° All computers consist of five components • Processor: (1) datapath and (2) control • (3) Memory • (4) Input devices and (5) Output devices ° Not all “memory” are created equally • Cache: fast (expensive) memory are placed closer to the processor • Main memory: less expensive memory--we can have more ° Input and output (I/O) devices have the messiest organization • Wide range of speed: graphics vs. keyboard • Wide range of requirements: speed, standard, cost. . . • Least amount of research (so far) ECE 232 L 2 Basics. 11 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Typical computer structure (stored program) Data Path (DP) Memory data bus A bus B

Typical computer structure (stored program) Data Path (DP) Memory data bus A bus B R 0 R 1 decoder instruction DP control ALU R 31 ALU control condition Controller Registers bus C shifter ° von Neumann vs. Harvard architecture ECE 232 L 2 Basics. 12 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Summary: Computer System Components Proc Caches Busses adapters Memory Controllers I/O Devices: Disks Displays

Summary: Computer System Components Proc Caches Busses adapters Memory Controllers I/O Devices: Disks Displays Keyboards Networks ° All have interfaces & organizations ECE 232 L 2 Basics. 13 Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Execution Cycle Instruction Obtain instruction from program storage Fetch Instruction Determine required actions and

Execution Cycle Instruction Obtain instruction from program storage Fetch Instruction Determine required actions and instruction size Decode Operand Locate and obtain operand data Fetch Execute Result Compute result value or status Deposit results in storage for later use Store Next Instruction ECE 232 L 2 Basics. 14 Determine successor instruction Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers

Instruction Set Architecture: What Must be Specified? Instruction Fetch ° Instruction Format or Encoding

Instruction Set Architecture: What Must be Specified? Instruction Fetch ° Instruction Format or Encoding – how is it decoded? Instruction ° Location of operands and result Decode – where other than memory? Operand Fetch – how many explicit operands? – how are memory operands located? – which can or cannot be in memory? Execute Result Store Next Instruction ECE 232 L 2 Basics. 15 ° Data type and Size ° Operations – what are supported ° Successor instruction – jumps, conditions, branches Adapted from Patterson 97 ©UCB Copyright 1998 Morgan Kaufmann Publishers