ECE 103 DIGITAL LOGIC DESIGN CHAPTER V SEQUENTIAL

ECE 103 DIGITAL LOGIC DESIGN CHAPTER V SEQUENTIAL LOGIC CIRCUITS PART 2 Reference: M. Morris Mano & Michael D. Ciletti, "Digital Design", Fourth Edition, Prentice Hall of India Pvt. Ltd. , Chapter – Chapter -5 & 6 VIT UNIVERSITY 1

VIT UNIVERSITY 2

VIT UNIVERSITY 3

VIT UNIVERSITY 4

VIT UNIVERSITY 5

VIT UNIVERSITY 6

VIT UNIVERSITY 7

VIT UNIVERSITY 8

VIT UNIVERSITY 9

VIT UNIVERSITY 10

VIT UNIVERSITY 11

VIT UNIVERSITY 12

VIT UNIVERSITY 13

VIT UNIVERSITY 14

VIT UNIVERSITY 15

VIT UNIVERSITY 16

VIT UNIVERSITY 17

VIT UNIVERSITY 18

Excitation Table For a T Flip Flop Row Q Q+ T Previous State -> Present State T 0 0 0 -> 0 0 1 0 1 1 0 -> 1 1 2 1 0 1 1 -> 0 1 1 -> 1 0 3 1 1 0 Excitation Table For a JK Flip Flop ("X" is "don't care") Previous State -> J Present State K 0 -> 0 0 X 0 -> 1 1 X 1 -> 0 X 1 1 -> 1 X 0 VIT UNIVERSITY 19

VIT UNIVERSITY 20

VIT UNIVERSITY 21

VIT UNIVERSITY 22

VIT UNIVERSITY 23

VIT UNIVERSITY 24

VIT UNIVERSITY 25

VIT UNIVERSITY 26

VIT UNIVERSITY 27

VIT UNIVERSITY 28

VIT UNIVERSITY 29

VIT UNIVERSITY 30

Assignments Problems VIT UNIVERSITY 31

Assignments Problems… q The contents of a 4 -bit register is initially 0000. The register is shifted eight times to the left, with the sequence 00101011 as the serial input. The leftmost bit of the sequence is applied first. What is the content of the register after each shift? VIT UNIVERSITY 32

Assignments Problems… q Design a finite state machine to detect a bit pattern in a sequence of binary bits. The FSM will have one data input X, a reset input R, and an output Y. Y is ‘ 1’ when the previous four bits received have the pattern “ 0110” and ‘ 0’ otherwise. In the example below the pattern occurs twice, and Y=’ 1’ on the following clock cycle. q X = 011101101001110110001 q Y = 00000000100 q a. Determine how many states are required, and make a state transition table. q b. Determine the number of D flip‐flops and find the Boolean equations for the next‐state logic and the output logic. q c. Sketch a schematic of your design. VIT UNIVERSITY 33

Assignments Problems… q Suppose a certain sequential circuit has a JK flip-flop labeled A and a D flip-flop labeled B. In q addition, the circuit has an input x and an output y. The formulas for the flip-flop inputs and y q are given below. q JA = x 0 q KA = B 0 q DB = A 0 + B 00 q y = x. A 0 B 0 q (a) Draw the circuit. q (b) Write the next state equation for the A flip-flop. q (c) Write the next state equation for the B flip-flop. q (d) Write down the state table of the circuit. q (e) Write down the state diagram of the circuit. q For the circuit in Figure 1, write down the next state equation for the A flip-flop VIT UNIVERSITY 34

Assignments Problems… q For the circuit in Figure 2, do the following: (a) Write the next state equation for the A flip-flop. (b) Write the next state equation for the B flip-flop. (c) Write down the output equation for y. (d) Write down the state table of the circuit. (e) Write down the state diagram of the circuit. q For the circuit in Figure 3, do the following: (a) Write the next state equation for the A flip-flop. (b) Write the next state equation for the B flip-flop. (c) Write down the output equation for y. (d) Write down the state table of the circuit. (e) Write down the state diagram of the circuit. VIT UNIVERSITY 35

Assignments Problems… q. For more problems : q. Refer : M. Morris Mano, "Digital Design", 3 rd Edition, Prentice Hall of India Pvt. Ltd. , Chapter - Pages() VIT UNIVERSITY 36

Assignments Problems… VIT UNIVERSITY 37

Assignments Problems… VIT UNIVERSITY 38

Assignments Problems… VIT UNIVERSITY 39

Assignments Problems… VIT UNIVERSITY 40

Assignments Problems… VIT UNIVERSITY 41