Developing a multithread product Introduction ENCM 491 real

Developing a multi-thread product – Introduction (ENCM 491 – real time operating systems in 1 hr) M. Smith Electrical Engineering, University of Calgary Smithmr @ ucalgary. ca 12/20/2021 1

References 1) 2) 3) 4) Understanding GPS Principles and Applications, 1996, Elliott D. Kaplan Digital Signal Processing – A Practical Approach, 1993, Emmanuel C. Ifeachor, Barrie W. Jervis ADSP-TS 101 Tiger. SHARC and Blackfin Processor Programming References, Analog Devices Articles submitted to Circuit Cellar magazine by M. Smith, March 2004 12/20/2021 2

Introduction n GPS traditionally done with ASIC/Processor combination Looking at FPGA/DSP combination for low end GPS receivers Technological interest in software radio q q n Cheaper, quicker development cycle. Customizations for special applications From a talk by Darrell Anklovitch for ENEL 619. 23 12/20/2021 3

What is GPS? Global Positioning System 24 satellite (SV) constellation Orbiting 20, 000 km from the surface of the Earth in 12 hour cycles Orbits are set-up to give global coverage 24 hours a day Need at least 4 satellites in view to calculate a position 12/20/2021 (1) 4

GPS Positioning Concepts (1) n For now make 2 assumptions: q q n n We know the distance to each satellite We know where each satellite is Require 3 satellites for a 3 -D position in this “ideal” scenario Requires 4 satellites to account for local receiver clock drift. 12/20/2021 5

GPS Signal Structure n n n Each satellite transmits 2 carrier frequencies referred to as L 1 (1575 MHz) and L 2 (1227 MHz) Each carrier frequency is BPSK modulated with a unique PRN (pseudo random number) code The PRN code on L 1 is called CA code (coarse acquisition), The PRN code on L 2 is called P code (precise) CA code takes 1 ms for full PRN transmission at 1 MHz chip (bit) rate. P code takes 1. 5 s for full PRN transmission at ~10 MHz chip rate Also modulated on each carrier is 50 Hz data that includes the current position of the satellite 12/20/2021 6

Determining Time (1) n n Use the PRN code to determine time Use time to determine distance to the satellite distance = speed of light * time 12/20/2021 7

Algorithms to Find PRN Phase n Time-domain Cross correlation: 1/N ∑ x 1 q n n Coding equivalent to FIR filter, but need to filter N sets of data, each shifted by one data point – looks like a final exam question to me. Correlation of perfectly matching signals gives a maximum value Correlation of 2 random data sequences tends to 0 q n (n) * x 2(n) PRN code from different satellites are designed to correlate to 0. D Frequency domain correlation: 1/N 1(k)X 2(k)] where F-1 is the inverse Discrete Fourier Transform and the X’s are the Discrete Fourier Transforms of two sequences 12/20/2021 F-1[X 8

Timing n Frequency Domain 1/N F-1[X 1(k)X 2(k)] q q q 1024 point FFT (2 * NLOG 2 N) 30, 000 1024 MULTS (N) Complex 1024 point INV FFT (NLOG 2 N) operations N-1 n Time Domain 1/N ∑ x 1 (n) * x 2(n) n=0 n q q 12/20/2021 1024 MACs 1024 Phases 2 (N) (N) 1, 048, 576 operations 9

Tiger. SHARC -- TS 101 and TS 201 TS 101 Can do “COMPLEX” arithmetic TS 201 Low-cost version $45 / chip Evaluation boards $950 each educational price 12/20/2021 10

Implementing a multi-thread system working on batch data – “audio example” Collect N pts @ 44 k. Hz array 1 Collect N pts @ 44 k. Hz array 2 Process array 1 Collect N pts @ 44 k. Hz array 3 Process array 2 Collect N pts @ 44 k. Hz array 1 Process array 3 Transmit N pts @ 44 k. Hz array 2 Collect N pts @ 44 k. Hz array 2 Process array 4 Transmit N pts @ 44 k. Hz array 3 12/20/2021 Transmit N pts @ 44 k. Hz array 1 11

Implementing a multi-thread system -- “audio example” Collect N pts @ 44 k. Hz array 1 Collect N pts @ 44 k. Hz array 2 Move array 1 array 4 Simulate. Complex Collect N pts @ 44 k. Hz array 3 Move array 2 array 5 Transmit N pts @ Simulate. Complex 44 k. Hz array 4 Collect N pts @ 44 k. Hz array 1 Move array 3 array 6 Transmit N pts @ Simulate. Complex 44 k. Hz array 5 Collect N pts @ 44 k. Hz array 2 Move array 1 array 4 Transmit N pts @ Simulate. Complex 44 k. Hz array 6 12/20/2021 12

Essentially n Take an audio Talk-through program for loop { Read_a_sample; Perform operation; Write_a_sample; } n Turn into 5 -threads running under interrupts q q q Idle thread Initialization thread – sets up system, when ready – launches the other threads – then activates the first thread Read. Value. Thread, Process. Value. Thread – with simulated Complex Algorithm Write. Value. Thread 12/20/2021 13

Initialization Thread 12/20/2021 14

Main Thread – example 12/20/2021 15

Need to investigate and understand system behaviour and limitations Concept of task priority 12/20/2021 16

Using real-time audio-threads -Write 12/20/2021 17

VDK – Status History 12/20/2021 18

Adding the Initialization thread 12/20/2021 19

Making the Initialization. Thread a “Boot Thread” 12/20/2021 20

Add the thread programming control 12/20/2021 21

Avoid the free-running code 12/20/2021 22

Then add semaphores to control flow 12/20/2021 23

Essential, if not exact, concept of multithreading code n Do all the initial preparation of the board q q q Set up stack Set up “C/C++” environment Set up processor timer n n n Default on Blackfin ADSP-BF 533 board – every 0. 05 ms (called a TIC) an interrupt occurrs Start with an IDLE Thread When first TIC occurs – the interrupt handler will cause the Scheduler ISR to run 12/20/2021 24

Scheduler ISR n n n n Save all the registers (etc) of the IDLE thread to the IDLE thread context buffer Recover all the registers for the scheduler ISR context buffer (saved somewhere during the initialization procedure) There had better be a boot thread – otherwise system hangs q VDK tool will not let you build a system without at least one boot thread Decide which boot thread has the highest priority? Save all the registers from the Scheduler ISR back into the context buffer Recover all the registers for the boot thread from its context buffer Return from ISR q We have now performed a “context switch” between the IDLE thread and the BOOT thread. 12/20/2021 25

Boot thread n n The boot thread now executes until the first TIC occurs (next ISR call) We now switch back into Scheduler q q n Save all the registers (etc) of the FIRST BOOT THREAD thread to the thread context buffer Recover all the registers for the scheduler ISR context buffer Other threads need launching? q q If there are other Boot threads then launch them depending on their priority and the ROUND ROBIN scheduling behaviour set by the programmer for tasks of equal priority If a boot thread has requested that other threads need launching then launch those. Unclear when the VDK: : Create. Thread operation occurs 12/20/2021 26

The launching of threads Looks like threads get launched “during a TIC” – meaning that another context switch occurs for each VDK: : Create. Thread ( ) Does that apply to VDK: : Post. Semaphores( ) too? 12/20/2021 27

Back in scheduler n Other threads need launching? q q n Have threads posted semaphores? q q n If there are other Boot threads then launch them depending on their priority and the ROUND ROBIN scheduling behaviour set by the programmer for tasks of equal priority If a boot thread has requested that other threads need launching then launch those. Store them in a “posted semaphore table. Threads can also post “messages” but I have not worked that out yet Are threads pending semaphores? q q Depending on which task is running now, and its relative priority to tasks that are pending semaphores then either perform context switching or not How do you handle conflicts? I think that is my problem with my final version of Lab. 5 part 3 12/20/2021 28

Original audio-talk through program ISR routine Channel to Channel Copy 12/20/2021 Multi-tasking version of ISR routine 29

Step 1 – Add Talk-through program 12/20/2021 30

Step 2 – Investigate Thread Behaviour 12/20/2021 31

Step 3 – Fix Thread Behaviour 12/20/2021 32

Step 4 – Start migrating code to the various threads -- Fix ISR behaviour ORIGINAL NEW VERSION 12/20/2021 33

Fix Thread Behaviour n Initialization thread q n Read. Thread q n Moves my_In Value Process Value Process. Thread q q n Creates other threads and then waits for ever Moves Process Value Process. Done Value Calls a “non-optimizable to nothing” routine Simulate. More. Complex. Process(cycles_to_waste) Write. Thread q Moves Process. Done Value my_Out Value 12/20/2021 34

Final Read. Thread 12/20/2021 35

Final Process. Thread 12/20/2021 36

Final Write. Thread 12/20/2021 37

Thread Behaviour depends on Task priorities ALL TASKS HAVE EQUAL PRIORITY WRITE TASK HAS HIGHER PRIORITY THAN PROCESS TASK 1) Read Task – sends semaphore to Process Task 2) Process Task – sends semaphore to Write Task and “starts to waste cycles” 3) Scheduler determines that Write Task can start, send semaphore to Read Task, and finish – and then 4) Scheduler lets Process Task finish (? Why not let Read Task restart? ) 12/20/2021 38

Thread Behaviour n Useless as system is “free running” and the signals input and output have no relationship to samples generated by ISR Some samples repeated many times, others are not q Number of repeats depends on the time that Process. Thread takes to execute 12/20/2021 q 39

Need to add an ISR semaphore 12/20/2021 40

Read Thread – starts on ISR semaphore STANDARD APPROACH VDK: : Post. Semaphore( ) DOES NOT WORK Blackfin Assembly code looks like 68 K With LINK, UNLINK, 12/20/2021 RTS instructions MACRO 41

Many issues still need handling n n n How much time is available before losing sound quality? What are the best priorities for the tasks, and does that priority depend on how much time is spent in Process. Task? What is the best setting for the task scheduler TIC time (based on processor internal timer)? q q Too fast – too much time saving / recovering registers during task switching Too slow – problems with interrupts being missed or values being over-writtem 12/20/2021 42

Scheduling based on TIC time DEFAULT TIC = 0. 05 ms TIC = 0. 005 ms Don’t forget – TICs are shortened 12/20/2021 43

Which is the Slower / Faster TIC time? Question – how does the thread status history reflect sound quality? 12/20/2021 44