Detailed Analysis of Mi Bench benchmark suite Lin

Detailed Analysis of Mi. Bench benchmark suite Lin Tang, Shweta Mokashi EEL 5764 Computer Architecture

Overview § Motivation § Mi. Bench benchmark suite § Simulation Methodology § Simulation Results § Future work

Motivation § Majority of microprocessors employed in embedded domain § Features like instruction distribution, memory behavior and available parallelism distinguish embedded applications from other applications § Most widely used SPEC benchmarks characterize workload for general purpose computers § Wide range of applications makes it difficult to characterize the embedded domain

Mi. Bench Suite § All programs are freely available as standard C code § Benchmarks are divided into six suites - each suite targets a specific area of embedded market § Benchmarks – Automotive and Industrial Control: Processors require performance in basic math abilities, bit manipulation, data input/output and simple data organization – Network: Require processors involving shortest path calculations, tree and table lookups and data input and output

Mi. Bench Suite (contd. ) – Security: Includes algorithms for data encryption, decryption and hashing – Consumer Devices: Multimedia applications which include jpeg encoding/decoding, image color format conversion, image dithering, color palette reduction, MP 3 encode/decoding, and HTML typesetting – Office Automation: Text manipulation algorithms representing office machinery like printers, fax machines and word processors – Telecommunications: Benchmarks consist of voice encoding and decoding algorithms, frequency analysis and a checksum algorithm

Mi. Benchmarks Auto/ Industrial Network Security Consumer Devices Office Tele. Comm Automation Basicmath Djikstra Blowfish encode Jpeg Rsynth Crc Bitcount Patricia Blowfish decode Lame stringsearch Fft Qsort Crc Rjindael decode mad Susan (edges) Sha sha tiff 2 rgba Susan (corners) Blowfish Susan (smoothing) tiffdither tiffmedian ifft

Simulation Methodology § Simulation Tool: – Simple. Scalar ARM § Branch prediction schemes: – – – Bimodal Comb Gshare Notaken Taken § Cache Miss Rate as a function of … – Cache size – N-way set associative § ARM Configuration

Instruction count

Instruction Mix

Cache Miss Rates

Branch Prediction results

ARM Configurations

Instructions per cycle

Future work § Power Analysis using Sim-panalyzer § Estimate power consumption in different components that model distinct parts of computer – cache power, datapath and execution power, clock tree power and I/O) power

Questions? ? ?