Design and Implementation of a wide band RF

Design and Implementation of a wide band RF Phase Detector enhanced with signal monitoring capabilities Research project report presentation as a part of the Summer Internship in Science and Technology (SIST) By Souma Badombena-Wanta Supervised by: Rene Padilla Accelerator Division/ RF Section

Introduction The RF Section in the Accelerator Division of Fermilab plays a very important role, as it provides RF power and monitoring for particle acceleration through the RF system. The ultimate goal of the RF system is providing power to be transferred to the beam to increase its energy. Such a procedure involves a set of different tasks performed such as providing the RF frequency used for acceleration, as well as taking care of the proper phasing of this RF so that it is in time with the beam.

Project overview The project involved the prototyping of a PCB(Printed Circuit Board) for the Wide Band Phase Detector following design specifications and an implementation strategy in order to meet different requirements and come up with a new and improved design. Additional tasks have been performed to assemble and enclose the module.

Brief outline Overview of the RF cavity tuning system Ø General system description Ø Definition and mode of operation of a phase detector Ø Implementation strategy and experimental details Ø Results and discussion Ø

The RF cavity tuning system:

The RF cavity tuning loop Phase Detector in use mounted in rack

How Phase Detectors works? A phase detector is basically a frequency mixer or analog multiplier that generates a voltage signal which represents the difference in phase between two input signals. n The basic concept upon which phase detection rests is that the application of two identical frequency, constant amplitude signals to a mixer, results in a dc output which is proportional to the phase difference between the two signals n

Theory of Operation Typical Double-Balanced Mixer Processing at the RF Frequency

Block Diagram of the Phase Detector

Main signal processing components ØMixers ØPower splitters ØLog-Amps Different signal paths Ø Ø Ø From RF 1/RF 2 IN to Phase Detector out From RF 1 IN to RF 1 monitor From RF 2 IN to RF 2 monitor From RF 1 IN to RF 1 Freq. to Voltage Out From RF 2 IN to RF 2 Freq. to Voltage Out

Implementation strategy and experimental details: Ø Design Specifications(regarding enhanced design): § § § Phase detector output: 20 Vp-p Frequency-to-Voltage converter: linear response describing a voltage as a function of frequency with a slope of 0. 1 V/MHz. Output envelope detector: 1 Vp-p with input of 1 Vp-p @ 53 Mhz RF Monitor outputs terminated in 50 ohms Power supply voltages: +5 V, +15 V, -15 V

Ø Design highlights Designing the phase detector part of the circuit mainly involved selection of adequate op-amp and potentiometers in order to get exactly the value of 20 Vp-p. § The frequency-to-voltage converter design was accomplished more importantly by scaling the voltage coming out from the PLP-10. 7. § In order to get a good envelope detector signal, we investigated the properties for the Vlog signal, that we fed into an OPA 627 and used appropriate potentiometers to trim out offset voltages. §

Circuit Diagram

Experimental results and discussion §Upon designing and laying down the circuits on the board, we performed a series of tests that allowed us to verify the operation of the circuits and judge or assess the accuracy of the results in comparison with the expected ones. §Preliminary tests and measurements were performed in the RF lab, then in RF Booster system where the device was temporarily incorporated in the system and operated.

-Phase Detector Results: Phase Detector output (voltage vs. time): 20 Vp-p, 1 V/90 o Phase difference viewed between cathode and anode in RF booster system

Frequency-to-Voltage results: Plot generated with output voltage obtained by varying the frequency (quasi-linear for 3060 MHz with 0. 1 V/MHz Oscilloscope graph representing the voltage resulting from frequency conversion as it sweeps from 37 to 53 MHz

Envelope Detector results: Plot of Vlog output voltage vs. Amplitude of RF input frequency (d. Bm) Envelope signal detected for both, anode and cathode power.

Raw RF signal monitors results RF frequency generator signal monitored Cathode and Anode raw signals viewed at the RF monitors (50 ohms terminated)

General hardware configuration Prototype board of the module

Enclosing and assembling the modules Front Panel Rear Panel

Our Assembled Device

Conclusion Overall, this design proved to be successful as we have been able to generate optimal expected results. However, minor adjustements has to be brought to design, such as perfecting the output signal but triming out offsets and getting rid of major noise signals.

Thank You Questions?