Design a memory subsystem for 32 bit MP

Design a memory subsystem for 32 -bit MP: 1 Mx 32 bit RAM & 1 Mx 32 bit ROM Using 512 Kx 1 bit RAM & 256 Kx 8 bit ROM

1 Mx 32 NO. OF RAM= 512 Kx 1 1 Mx 32 NO. OF ROM= 256 Kx 8 20 1 M=2 19 512 K=2 18 256 K=2 = 2 x 32 = 64 chips = 4 x 4 = 16 chips

RAM A 31 A 30 A 29 A 28 A 27 A 26 A 25 0 0 0 0 0 0 0 A 24 A 23 A 22 A 21 A 20 A 19 A 18 A 17 A 16 A 15 A 14 A 13 A 12 A 11 A 10 A 9 A 8 A 7 A 6 A 5 A 4 A 3 A 2 Range 0 0 0 0 0 0 0 1 1 1 1 1 0000 0007 FFFF 0 0 1 0 0 0 0 0 0 1 1 1 1 1 00080000 000 FFFFF

512 X 1 RAM 512 32 bit 512 X 1 RAM cs 0

512 X 1 RAM 512 32 bit 512 X 1 RAM cs 1

Each Banck Contains ON 8 Chips From (512 x 1)ROM 512 x 1 RAM A 0 -A 18 512 x 8 RAM A 0 -A 18 A 0 – A 18 A 0 -A 18 D 0 – D 7 512 x 1 RAM D 2 D 3 RAM RAM A 0 -A 18 512 x 1 A 0 -A 18 cs 512 x 1 D 0 D 1 512 x 1 RAM D 4 D 5 512 x 1 RAM D 6 D 7

ROM A 30 A 29 A 28 A 27 A 26 A 25 A 24 A 23 A 22 A 21 A 20 A 19 A 18 A 17 A 16 A 15 A 14 A 13 A 12 A 11 A 10 A 9 FFF 00000 FFF 3 FFFF 40000 FFF 7 FFF 80000 FFFBFFFF FFFC 0000 FFFF A 8 A 7 A 6 A 5 A 4 A 3 A 2 1 1 1 1 1 0 0 0 1 0 1 0 1 0 1 0 1 1 1 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 0 0 0 1 0 1 0 1 0 1 0 1 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 1 1

A 2 -A 19 / CS 7 BE 0 MRD A 2 -A 19 / A 20 A 21 A 22 138 -DEC G 1’ G 2’ CS 4 CS 6 CS 5 CE D 0 -D 7 256 x 8 ROM OE CS 4 CS 5 CS 6 CS 7 CE G 3 A 2 -A 19 / BE 1 MRD D 8 -D 15 256 x 8 OE D 16 -D 23 CE A 23 -A 31 256 x 8 BE 2 A 2 -A 19 / OE MRD 0 D 24 -D 31 CE BE 3 MRD 256 x 8 OE