Department of Computer Engineering Prince of Songkla University

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Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Lecture 6 Complex

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Lecture 6 Complex NMOS 240 -451 VLSI, 1

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut In the Past

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut In the Past VDD A C C B B Y Y A B C 240 -451 VLSI, A B C 2

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Memory NMOS 240

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Memory NMOS 240 -451 VLSI, 3

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM. 1

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM. 1 Dynamic RAM using 6 NMOS High bit rate 1 word sequential 1 B A 240 -451 VLSI, 4

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM. 2

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM. 2 Dynamic RAM using 4 NMOS Row select 240 -451 VLSI, 5

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using 4 NMOS B 1 - bit line 240 -451 VLSI, B 2 - bit line 6

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM using 4 NMOS Activate word line I I=0 off 240 -451 VLSI, on 7

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “ 0”

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “ 0” in Dynamic RAM using 4 NMOS 1 0 OFF ON Cg 2 Release Q until not have I at T 2, then Cg 1 charge Q until T 1 ON Flip/Flop 240 -451 VLSI, 8

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using 3 NMOS Read/write start at f 2 = 1 1 240 -451 VLSI, 9

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “ 1”

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “ 1” in Dynamic RAM using 3 NMOS write and f 2 = 1 0 off Y=1 240 -451 VLSI, 10

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “ 0”

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write “ 0” in Dynamic RAM using 3 NMOS write and f 2 = 0 1 Off 240 -451 VLSI, No changing 11

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM using 3 NMOS write and f 2 = 0 / read and f 2 = 1 OFF ON Off when Y = 0 If Y = 1 bit line = 0 if Y= 0 bit line = 1 240 -451 VLSI, 12

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Dynamic RAM using 1 NMOS 240 -451 VLSI, 13

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write into Dynamic

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Write into Dynamic RAM using 1 NMOS 1 Write ‘ 1’ with charge Cs Value which want to write ’ 0‘or ‘ 1’ 240 -451 VLSI, Write ‘ 0’ with nocharge Cs 14

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Read Dynamic RAM using 1 NMOS 0 discharge Q ’ 0‘or ‘ 1’ detect with sense amplifier 240 -451 VLSI, 15

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Static RAM 240

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Static RAM 240 -451 VLSI, 16

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut ROM • PROM

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut ROM • PROM (mask programmable rom( • EPROM (erasable programmable rom( • EEPROM (electrically erasable programmable rom( 240 -451 VLSI, 17

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Memory Structure in

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Memory Structure in VLSI 240 -451 VLSI, 18

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut ROM circuit, 4

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut ROM circuit, 4 x 4 bit NOR based ROM Array 240 -451 VLSI, 19

Department of Computer Engineering, Prince of Songkla University 240 -451 VLSI, by Wannarat Suntiamorntut

Department of Computer Engineering, Prince of Songkla University 240 -451 VLSI, by Wannarat Suntiamorntut 20

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut 4 x 4

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut 4 x 4 bit NAND based ROM Array 240 -451 VLSI, 21

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Shift Register •

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Shift Register • temporary memory using in Data path Half register 240 -451 VLSI, Half register 22

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Half Register Half

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Half Register Half register 240 -451 VLSI, 23

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Data Path 240

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut Data Path 240 -451 VLSI, input Combination 24

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut PLA (Programmable logic

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut PLA (Programmable logic arrays( • Built by R. Preobsting NOR-NOR Structure (Product of Sum( 240 -451 VLSI, 25

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut PLA (Programmable logic

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut PLA (Programmable logic arrays( Change to be NOR logic before program 240 -451 VLSI, 26

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut How to program

Department of Computer Engineering, Prince of Songkla University by Wannarat Suntiamorntut How to program PLA 240 -451 VLSI, 27