Decisiondirected Joint Tracking Loop for Carrier Phase and

Decision-directed Joint Tracking Loop for Carrier Phase and Symbol Timing in QAM Project 2 ECE 283 Fall 2004

Outline • • • System concept QAM signal source and receiver Decision-directed PLL Characterization Tools Submission

System Concept (1) Simplified 64 -QAM communications system 64 -QAM demodulated with perfect phase and 2. 5% phase lag

System Concept (2) Receiver Transmitter QAM receiver system QAM communication system

QAM Signal Source and Receiver QAM receiver QAM transmitter

Decision-directed PLL system diagram

Complete System

PLL Output (1) Phase locking performance with a random QAM waveform

PLL Output (2) Phase locking with 10% deviated frequency signal

PLL Tuning • • • Modulation frequency Number of waves per symbol LPF VCO and VCC Symbol feedback delay

Characterization • • Waveforms Timing error (RMS) Capture range Loop lock range Effect of symbol error Effect of signal noise And more

Tools • A Continuous-time simulation tool – Simulink is recommended – Circuit-level simulation ?

Submission • Files: All files should be in “lastname_firstname” directory and the directory should be compressed – Document: IEEE journal format, ps or pdf, “lastname_firstname. ps/pdf” – Source Files: One-step testable codes with appropriate waveform output scopes • Deadline: 11: 00 pm, 10/15 Friday, time marked by receiving mail server • Email: dkim@ee. duke. edu