CUDA Programming Model These notes will introduce Basic

CUDA Programming Model These notes will introduce: • Basic GPU programming model • CUDA kernel • Simple CUDA program to add two vectors together • Compiling the code on a Linux system ITCS 4/5145 Parallel Programming, UNC-Charlotte, B. Wilkinson, April 3, 2012 1

Programming Model GPUs historically designed for creating image data for displays. That application involves manipulating image pixels (picture elements) and often the same operation each pixel SIMD (single instruction multiple data) model - An efficient mode of operation in which the same operation is done on each data element at the same time 2

SIMD (Single Instruction Multiple Data) model Also know as data parallel computation. One instruction specifies the operation: Instruction a[] = a[] + k ALUs a[0] a[1] a[n-2] a[n-1] Very efficient of this is what you want to do. One program. Can design computers to operate this way. 3

Single Instruction Multiple Thread Programming Model A version of SIMD used in GPUs use a thread model to achieve very high parallel performance and to hide memory latency Multiple threads, each execute the same instruction sequence. On a GPU, a very large number of threads (10, 000’s) possible. Threads mapped onto available processors on GPU (100’s of processors all executing same program sequence) 4

Programming applications using SIMT model Matrix operations -- very amenable to SIMT • Same operations done on different elements of matrices Some “embarassingly” parallel computations such as Monte Carlo calculations • Monte Carlo calculations use random selections Random selections are independent of each other Data manipulations • Some sorting can be done quite efficiently … 5

CUDA kernel routine To write a SIMT program, one needs to write a code sequence that all the threads on the GPU will do. In CUDA, this code sequence is called a Kernel routine Kernal code will be regular C except one typically needs to use thread ID in expressions to ensure each thread accesses different data: Example … index = Thread. ID; A[index] = B[index] + C[index]; All theads do this 6

CPU and GPU memory • Program once compiled has code executed on CPU and (kernel) code executed on GPU • Separate memories on CPU and GPU Need to • Explicitly transfer data from CPU to GPU for GPU computation, and CPU main memory Copy from CPU to GPU Copy from GPU to CPU GPU global memory GPU • Explicitly transfer results in GPU memory copied back to CPU memory 7

Basic CUDA program structure int main (int argc, char **argv ) { 1. Allocate memory space in device (GPU) for data 2. Allocate memory space in host (CPU) for data 3. Copy data to GPU 4. Call “kernel” routine to execute on GPU (with CUDA syntax that defines no of threads and their physical structure) 5. Transfer results from GPU to CPU 6. Free memory space in device (GPU) 7. Free memory space in host (CPU) } return; 8

1. Allocating memory space in “device” (GPU) for data Use CUDA malloc routines: int size = N *sizeof( int); // space for N integers int *dev. A, *dev. B, *dev. C; // dev. A, dev. B, dev. C ptrs cuda. Malloc( (void**)&dev. A, size) ); cuda. Malloc( (void**)&dev. B, size ); cuda. Malloc( (void**)&dev. C, size ); 9 Derived from Jason Sanders, "Introduction to CUDA C" GPU technology conference, Sept. 20, 2010.

2. Allocating memory space in “host” (CPU) for data Use regular C malloc routines: int *a, *b, *c; … a = (int*)malloc(size); b = (int*)malloc(size); c = (int*)malloc(size); or statically declare variables: #define N 256 … int a[N], b[N], c[N]; 10

3. Transferring data from host (CPU) to device (GPU) Use CUDA routine cuda. Memcpy Destination Source cuda. Memcpy( dev. A, A, size, cuda. Memcpy. Host. To. Device); cuda. Memcpy( dev_B, B, size, cuda. Memcpy. Host. To. Device); where: dev. A and dev. B are pointers to destination in device A and B are pointers to host data 11

4. Declaring “kernel” routine to execute on device (GPU) CUDA introduces a syntax addition to C: Triple angle brackets mark call from host code to device code. Contains organization and number of threads in two parameters: my. Kernel<<< n, m >>>(arg 1, … ); n and m will define organization of thread blocks and threads in a block. For now, we will set n = 1, which say one block and m = N, which says N threads in this block. arg 1, … , -- arguments to routine my. Kernel typically pointers to device memory obtained previously from cuda. Mallac. 12

Declaring a Kernel Routine A kernel defined using CUDA specifier __global__ Two underscores each side Example – Adding to vectors A and B #define N 256 __global__ void vec. Add(int *A, int *B, int *C) { // Kernel definition int i = thread. Idx. x; C[i] = A[i] + B[i]; CUDA structure that provides thread ID in block } Each of the N threads performs one pairwise addition: int main() { // allocate device memory & // copy data to device // device mem. ptrs dev. A, dev. B, dev. C Thread 0: Thread 1: dev. C[0] = dev. A[0] + dev. B[0]; dev. C[1] = dev. A[1] + dev. B[1]; Thread N-1: dev. C[N-1] = dev. A[N-1]+dev. B[N-1]; vec. Add<<<1, N>>>(dev. A, dev. B, dev. C); // Grid of one block, N threads in block … } 13 Loosely derived from CUDA C programming guide, v 3. 2 , 2010, NVIDIA

5. Transferring data from device (GPU) to host (CPU) Use CUDA routine cuda. Memcpy Destination Source cuda. Memcpy( C, dev. C, size, cuda. Memcpy. Device. To. Host); where: dev. C is a pointer in device and C is a pointer in host. 14

6. Free memory space in “device” (GPU) Use CUDA cuda. Free routine: cuda. Free( dev_a); cuda. Free( dev_b); cuda. Free( dev_c); 15

7. Free memory space in (CPU) host (if CPU memory allocated with malloc) Use regular C free routine to deallocate memory if previously allocated with malloc: free( a ); free( b ); free( c ); 16

Complete CUDA program #define N 256 __global__ void vec. Add(int *A, int *B, int *C) { int i = thread. Idx. x; C[i] = A[i] + B[i]; } int main (int argc, char **argv ) { Adding two vectors, A and B N elements in A and B, and N threads (without code to load arrays with data) int size = N *sizeof( int); int a[N], b[N], c[N], *dev. A, *dev. B, *dev. C; cuda. Malloc( (void**)&dev. A, size) ); cuda. Malloc( (void**)&dev. B, size ); cuda. Malloc( (void**)&dev. C, size ); cuda. Memcpy( dev. A, a, size, cuda. Memcpy. Host. To. Device); cuda. Memcpy( dev. B, b size, cuda. Memcpy. Host. To. Device); vec. Add<<<1, N>>>(dev. A, dev. B, dev. C); cuda. Memcpy( c, dev. C size, cuda. Memcpy. Device. To. Host); cuda. Free( dev_a); cuda. Free( dev_b); cuda. Free( dev_c); return (0); 17

Complete, with keyboard input for blocks/threads int main(int argc, char *argv[]) { int T = 10, B = 1; // threads per block/blocks per grid int a[N], b[N], c[N]; int *dev_a, *dev_b, *dev_c; (without timing execution, see later) cuda. Malloc((void**)&dev_a, N * sizeof(int)); cuda. Malloc((void**)&dev_b, N * sizeof(int)); cuda. Malloc((void**)&dev_c, N * sizeof(int)); #include <stdio. h> #include <cuda. h> #include <stdlib. h> #include <time. h> #define N 4096 for(int i=0; i<N; i++) { a[i] = i; b[i] = i*1; } // size of array __global__ void add(int *a, int *b, int *c) { int tid = block. Idx. x*block. Dim. x + thread. Idx. x; if(tid < N){ c[tid] = a[tid]+b[tid]; } } printf("Size of array = %dn", N); do { printf("Enter number of threads per block: "); scanf("%d", &T); printf("n. Enter nuumber of blocks per grid: "); scanf("%d", &B); if (T * B < N) printf("Error T x B < N, try again"); } while (T * B < N); // load arrays with some numbers cuda. Memcpy(dev_a, a , N*sizeof(int), cuda. Memcpy. Host. To. Device); cuda. Memcpy(dev_b, b , N*sizeof(int), cuda. Memcpy. Host. To. Device); cuda. Memcpy(dev_c, c , N*sizeof(int), cuda. Memcpy. Host. To. Device); add<<<B, T>>>(dev_a, dev_b, dev_c); cuda. Memcpy(c, dev_c, N*sizeof(int), cuda. Memcpy. Device. To. Host); for(int i=0; i<N; i++) { printf("%d+%d=%dn", a[i], b[i], c[i]); } cuda. Free(dev_a); cuda. Free(dev_b); cuda. Free(dev_c); return 0; // clean up 18

Compiling CUDA programs “nvcc” NVIDIA provides nvcc -- the NVIDIA CUDA “compiler driver”. Will separate out code for host and for device Regular C/C++ compiler used for host (needs to be available) Programmer simply uses nvcc instead of gcc/cc compiler on a Linux system Command line options include for GPU features 19

Compiling code - Linux Command line: Directories for #include files nvcc –O 3 –o <exe> <source_file> -I/usr/local/cuda/include Optimization level if you want optimized code –L/usr/local/cuda/lib –lcudart Directories for libraries Libraries to be linked CUDA source file that includes device code has the extension. cu nvcc separates code for CPU and for GPU and compiles code. Need regular C compiler installed for CPU. Make file convenient – see next. See “The CUDA Compiler Driver NVCC” from NVIDIA for more details 20

Very simple sample Make file NVCC = /usr/local/cuda/bin/nvcc CUDAPATH = /usr/local/cuda NVCCFLAGS = -I$(CUDAPATH)/include LFLAGS = -L$(CUDAPATH)/lib 64 -lcudart -lm prog 1: cc -o prog 1. c –lm A regular C program A C program with X 11 graphics prog 2: cc -I/usr/openwin/include -o prog 2. c -L/usr/openwin/lib -L/usr/X 11 R 6/lib -l. X 11 –lm A CUDA program prog 3: $(NVCC) $(NVCCFLAGS) $(LFLAGS) -o prog 3. cu A CUDA program with X 11 graphics prog 4: $(NVCC) $(NVCCFLAGS) $(LFLAGS) -I/usr/openwin/include -o prog 4. cu -L/usr/openwin/lib -L/usr/X 11 R 6/lib -l. X 11 -lm 21

Compilation process nvcc “wrapper” divides code into host and device parts. nvcc –o prog. cu –I/includepath -L/libpath nvcc Host part compiled by regular C compiler Device part compiled by NVIDIA “ptxas” assembler Two compiled parts combined into one executable ptxas gcc Combine Object file executable Executable file a “fat” binary” with both host and device code 22

Executing Program Simple type name of executable created by nvcc: . /prog 1 File includes all the code for host and for device in a “fat binary” file Host code starts running When first encounter device kernel, GPU code physically sent to GPU and function launched on GPU Hence first launch will be slow!! Run time environment (cudart) controls memcpy timing and synchronization 23

Questions