CSE 246 Computer Arithmetic Algorithms and Hardware Design

CSE 246: Computer Arithmetic Algorithms and Hardware Design Winter 2005 Lecture 1: Numbers Instructor: Prof. Chung-Kuan Cheng CSE 246

Agenda o o o Administrative Motivation Lecture 1: Numbers CSE 246 2

Administrative o o o Textbook: Computer Arithmetic Algorithms, Israel Koren, 2 nd Edition, Published by AK Peters Natick, Massachusetts Recommended: Art of Computer Programming, Volume 2, Seminumerical Algorithms (3 rd Edition), Donald E. Knuth In addition: set of papers to read CSE 246 3

Administrative o o o Grading: n Homework – 20% n Midterm – 35% n Project o Report – 25% o Presentation – 20% Midterm: Tuesday, Feb. 8 th Homework 1: n Due: 1/18/05 CSE 246 4

Administrative o Potential project samples: n n n CSE 246 Design interconnect and switch modules Use FPGAs, nano technologies for add/sub Design reconfigurable blocks Design Low power adder, multiplier Invent Low power/reliable number systems 5

Agenda o o o Administrative Motivation Lecture 1: Numbers CSE 246 6

Motivation Why do we care about arithmetic algorithms and hardware design? o Classic problems – well defined o Advancements will have a huge impact n o Solutions will be widely used New paradigm n n CSE 246 Interconnect dominated: clock, control, bus, signal Power driven Reliability centric FPGAs 7

Motivation o o Should a new business focus on building market or new technology? New technology: a market will be built around new technology CSE 246 8

Motivation o o What if we had a 10 GHz chip that was 2 cm x 2 cm? It takes 2 clock cycles (time of flight) to get from one end of the chip to the other n n CSE 246 How would the clock be distributed? What if the electrical input is 1 Volt/100 Watts? How do we get 100 Amps through the chip? 9

Topics o Numbers n o Addition/Subtraction n o o Binary numbers, negative numbers, redundant numbers, residual numbers Prefix adders (zero deficiency) Multiplication/Division Floating point operations Functions: (sqrt), log, exp, CORDIC Optimization, analysis, fault tolerance CSE 246 10

Other Topics o Potential focus on the following topics: n n n CSE 246 Power reduction Interconnect FPGAs 11

Goals/Background o Why do you want to take this class? What would you like to learn? n n n CSE 246 Fulfill course requirement Hardware Software Work Research Curiosity 12

Agenda o o o Administrative Motivation Lecture 1: Numbers CSE 246 13

Numbers o Special Symbols n n Symbols used to represent a value Roman Numerals 1=I 100 = C 5=V 500 = D 10 = X 1000 = M 50 = L For example: 2004 = MMIV CSE 246 14

Numbers o Position Symbols n The value depends on the position of the number For example: 125 = 100 + 20 + 5 One 100, Two 10 s, and Five 1 s Another example: 1 hour, 3 minutes o n CSE 246 Positional systems includes radixes: 2, -2, 2, 2 j (imaginary) 15

Numbers o Summation of positional numbers n Given: Value is: n For example: n o CSE 246 (where y is the base) Consider 4 -2 1 0 0 1 1 0 1 0 1 0 0 1 1 0 1 -2 -1 4 5 2 3 o o Note that position systems provide a complete range of numbers (e. g. – 2 to 5) 16

Signed Numbers o o o Biased numbers Signed Bit Complementary representation n Positive number: x (mod p) Negative number: (M-x) (mod p) (Note: mod p is added implicitly) n One’s complement n n CSE 246 0 0 0 1 1 1 0 1 -1 -0 Two’s complement M=2 n-1 0 0 0 1 Flip each bit 1 1 0 1 -2 -1 M=2 n Flip each bit + 1 Two’s complement can be used for subtraction 17

Signed Numbers o Two’s complement subtraction: n o (M-x+M-y) mod M = M-(x+y) Two’s complement conversion: n n CSE 246 Positive number: To negative: 18

Signed Numbers o Two’s complement Example: 0 0 1 1 0 1 0 1 Proof as follows: 0 1 2 3 -4 -3 -2 -1 Which leads to: CSE 246 19

Next time o Talk about redundant numbers CSE 246 20