CSE 245 ComputerAided Circuit Simulation and Verification Lecture

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CSE 245: Computer-Aided Circuit Simulation and Verification Lecture 1: Introduction and Formulation Spring 2008

CSE 245: Computer-Aided Circuit Simulation and Verification Lecture 1: Introduction and Formulation Spring 2008 Chung-Kuan Cheng

Administration • CK Cheng, CSE 2130, tel. 534 -6184, ckcheng@ucsd. edu • Lectures: 12:

Administration • CK Cheng, CSE 2130, tel. 534 -6184, ckcheng@ucsd. edu • Lectures: 12: 30 ~ 1: 50 pm TTH WLH 2205 • Textbooks – Electronic Circuit and System Simulation Methods T. L. Pillage, R. A. Rohrer, C. Visweswariah, Mc. Graw-Hill – Interconnect Analysis and Synthesis CK Cheng, J. Lillis, S. Lin, N. Chang, John Wiley & Sons • Grading – Homework and Projects: 60% – Project Presentation: 20% – Final Report: 20%

CSE 245: Course Outline • Formulation (2 -3 lectures) – – RLC Linear, Nonlinear

CSE 245: Course Outline • Formulation (2 -3 lectures) – – RLC Linear, Nonlinear Components, Transistors, Diodes Incident Matrix Nodal Analysis, Modified Nodal Analysis K Matrix • Linear System (3 -4 lectures) – – S domain analysis, Impulse Response Taylor’s expansion Moments, Passivity, Stability, Realizability Symbolic analysis, Y-Delta, BDD analysis • Matrix Solver (3 -4 lectures) – LU, KLU, reordering – Mutigrid, PCG, GMRES

CSE 245: Course Outline (Cont’) • Integration (3 -4 lectures) – – – Forward

CSE 245: Course Outline (Cont’) • Integration (3 -4 lectures) – – – Forward Euler, Backward Euler, Trapezoidal Rule Explicit and Implicit Method, Prediction and Correction Equivalent Circuit Errors: Local error, Local Truncation Error, Global Error A-Stable Alternating Direction Implicit Method • Nonlinear System (2 -3 lectures) – Newton Raphson, Line Search • Transmission Line, S-Parameter (2 -3 lectures) – FDTD: equivalent circuit, convolution – Frequency dependent components • Sensitivity • Mechanical, Thermal, Bio Analysis

Motivation • Why – Whole Circuit Analysis, Interconnect Dominance • What – Power, Clock,

Motivation • Why – Whole Circuit Analysis, Interconnect Dominance • What – Power, Clock, Interconnect Coupling • Where – Matrix Solvers, Integration Methods – RLC Reduction, Transmission Lines, S Parameters – Parallel Processing – Thermal, Mechanical, Biological Analysis

Circuit Simulation Circuit Input and setup Simulator: Solve numerically Output Types of analysis: –

Circuit Simulation Circuit Input and setup Simulator: Solve numerically Output Types of analysis: – DC Analysis – DC Transfer curves – Transient Analysis – AC Analysis, Noise, Distortions, Sensitivity

Program Structure (a closer look) Models Input and setup Numerical Techniques: – Formulation of

Program Structure (a closer look) Models Input and setup Numerical Techniques: – Formulation of circuit equations – Solution of ordinary differential equations – Solution of nonlinear equations – Solution of linear equations Output

Lecture 1: Formulation • Derive from KCL/KVL • Sparse Tableau Analysis (IBM) • Nodal

Lecture 1: Formulation • Derive from KCL/KVL • Sparse Tableau Analysis (IBM) • Nodal Analysis, Modified Nodal Analysis (SPICE) *some slides borrowed from Berkeley EE 219 Course

Conservation Laws • Determined by the topology of the circuit • Kirchhoff’s Current Law

Conservation Laws • Determined by the topology of the circuit • Kirchhoff’s Current Law (KCL): The algebraic sum of all the currents flowing out of (or into) any circuit node is zero. – No Current Source Cut • Kirchhoff’s Voltage Law (KVL): Every circuit node has a unique voltage with respect to the reference node. The voltage across a branch vb is equal to the difference between the positive and negative referenced voltages of the nodes on which it is incident – No voltage source loop

Branch Constitutive Equations (BCE) Ideal elements Element Branch Eqn Variable parameter Resistor v =

Branch Constitutive Equations (BCE) Ideal elements Element Branch Eqn Variable parameter Resistor v = R·i - Capacitor i = C·dv/dt - Inductor v = L·di/dt - Voltage Source v = vs i=? Current Source i = is v=? VCVS vs = AV · vc i=? VCCS is = GT · vc v=? CCVS vs = RT · ic i=? CCCS is = A I · ic v=?

Formulation of Circuit Equations • Unknowns – B branch currents (i) – N node

Formulation of Circuit Equations • Unknowns – B branch currents (i) – N node voltages (e) – B branch voltages (v) • Equations – N+B Conservation Laws – B Constitutive Equations • 2 B+N equations, 2 B+N unknowns => unique solution

Equation Formulation - KCL R 3 1 R 1 2 R 4 G 2

Equation Formulation - KCL R 3 1 R 1 2 R 4 G 2 v 3 0 Law: State Equation: Ai=0 N equations Node 1: Node 2: Branches Kirchhoff’s Current Law (KCL) Is 5

Equation Formulation - KVL R 3 1 R 1 2 Is 5 R 4

Equation Formulation - KVL R 3 1 R 1 2 Is 5 R 4 G 2 v 3 0 Law: State Equation: v - AT e = 0 B equations vi = voltage across branch i ei = voltage at node i Kirchhoff’s Voltage Law (KVL)

Equation Formulation - BCE R 3 1 R 1 Law: K vv + K

Equation Formulation - BCE R 3 1 R 1 Law: K vv + K i i = i s B equations 2 R 4 G 2 v 3 State Equation: 0 Is 5

Equation Formulation Node-Branch Incidence Matrix A branches 1 2 3 n o 1 d

Equation Formulation Node-Branch Incidence Matrix A branches 1 2 3 n o 1 d 2 e s i j (+1, -1, 0) N { Aij = +1 if node i is + terminal of branch j -1 if node i is - terminal of branch j 0 if node i is not connected to branch j B

Equation Assembly (Stamping Procedures) • Different ways of combining Conservation Laws and Branch Constitutive

Equation Assembly (Stamping Procedures) • Different ways of combining Conservation Laws and Branch Constitutive Equations – Sparse Table Analysis (STA) – Nodal Analysis (NA) – Modified Nodal Analysis (MNA)

Sparse Tableau Analysis (STA) 1. Write KCL: 2. Write KVL: 3. Write BCE: Ai=0

Sparse Tableau Analysis (STA) 1. Write KCL: 2. Write KVL: 3. Write BCE: Ai=0 v - ATe=0 Kii + Kvv=S (N eqns) (B eqns) N+2 B eqns N+2 B unknowns N = # nodes B = # branches Sparse Tableau

Sparse Tableau Analysis (STA) Advantages • It can be applied to any circuit •

Sparse Tableau Analysis (STA) Advantages • It can be applied to any circuit • Eqns can be assembled directly from input data • Coefficient Matrix is very sparse Disadvantages • Sophisticated programming techniques and data structures are required for time and memory efficiency

Nodal Analysis (NA) 1. Write KCL Ai=0 (N equations, B unknowns) 2. Use BCE

Nodal Analysis (NA) 1. Write KCL Ai=0 (N equations, B unknowns) 2. Use BCE to relate branch currents to branch voltages i=f(v) (B equations B unknowns) 3. Use KVL to relate branch voltages to node voltages v=h(e) (B equations N unknowns) Yne=ins Nodal Matrix N eqns N unknowns N = # nodes

Nodal Analysis - Example R 3 1 R 1 1. KCL: 2. BCE: 3.

Nodal Analysis - Example R 3 1 R 1 1. KCL: 2. BCE: 3. KVL: Yne = ins Yn = AKv. AT Ins = Ais G 2 v 3 2 R 4 Is 5 0 Ai=0 Kvv + i = is - Kvv A Kvv = A is v = A T e A K v. A T e = A i s

Nodal Analysis • Example shows how NA may be derived from STA • Better

Nodal Analysis • Example shows how NA may be derived from STA • Better Method: Yn may be obtained by direct inspection (stamping procedure) – Each element has an associated stamp – Yn is the composition of all the elements’ stamps

Nodal Analysis – Resistor “Stamp” Spice input format: N+ Rk N- Rk N+ i

Nodal Analysis – Resistor “Stamp” Spice input format: N+ Rk N- Rk N+ i N+ N- N+ NN- Rkvalue What if a resistor is connected to ground? …. Only contributes to the diagonal KCL at node N+ KCL at node N-

Nodal Analysis – VCCS “Stamp” Spice input format: NC+ - N+ N- NC+ NC-

Nodal Analysis – VCCS “Stamp” Spice input format: NC+ - N+ N- NC+ NC- Gkvalue N+ + vc NC- Gk NC+ N+ Gkvc N- NKCL at node N+ KCL at node N- NC-

Nodal Analysis – Current source “Stamp” Spice input format: Ik N+ N+ NN+ Ik

Nodal Analysis – Current source “Stamp” Spice input format: Ik N+ N+ NN+ Ik N- N- N+ N- Ikvalue

Nodal Analysis (NA) Advantages • Yn is often diagonally dominant and symmetric • Eqns

Nodal Analysis (NA) Advantages • Yn is often diagonally dominant and symmetric • Eqns can be assembled directly from input data • Yn has non-zero diagonal entries • Yn is sparse (not as sparse as STA) and smaller than STA: Nx. N compared to (N+2 B)x(N+2 B) Limitations • Conserved quantity must be a function of node variable – Cannot handle floating voltage sources, VCVS, CCCS, CCVS

Modified Nodal Analysis (MNA) How do we deal with independent voltage sources? + Ekl

Modified Nodal Analysis (MNA) How do we deal with independent voltage sources? + Ekl l k ikl k l • ikl cannot be explicitly expressed in terms of node voltages it has to be added as unknown (new column) • ek and el are not independent variables anymore a constraint has to be added (new row)

MNA – Voltage Source “Stamp” Spice input format: Vk + Ek N+ N- ik

MNA – Voltage Source “Stamp” Spice input format: Vk + Ek N+ N- ik N+ N- Ekvalue N+ N- ik N+ 0 0 1 N- 0 0 -1 Branch k 1 -1 0 RHS

Modified Nodal Analysis (MNA) How do we deal with independent voltage sources? Augmented nodal

Modified Nodal Analysis (MNA) How do we deal with independent voltage sources? Augmented nodal matrix In general: Some branch currents

MNA – General rules • A branch current is always introduced as an additional

MNA – General rules • A branch current is always introduced as an additional variable for a voltage source or an inductor • For current sources, resistors, conductors and capacitors, the branch current is introduced only if: – Any circuit element depends on that branch current – That branch current is requested as output

MNA – CCCS and CCVS “Stamp”

MNA – CCCS and CCVS “Stamp”

MNA – An example 1 R 1 + v 3 R 3 2 Is

MNA – An example 1 R 1 + v 3 R 3 2 Is 5 R 4 G 2 v 3 0 - ES 6 + E 7 v 3 Step 1: Write KCL (1) (2) (3) (4) 3 + R 8 4

MNA – An example Step 2: Use branch equations to eliminate as many branch

MNA – An example Step 2: Use branch equations to eliminate as many branch currents as possible (1) (2) (3) (4) Step 3: Write down unused branch equations (b 6) (b 7)

MNA – An example Step 4: Use KVL to eliminate branch voltages from previous

MNA – An example Step 4: Use KVL to eliminate branch voltages from previous equations (1) (2) (3) (4) (b 6) (b 7)

MNA – An example

MNA – An example

Modified Nodal Analysis (MNA) Advantages • MNA can be applied to any circuit •

Modified Nodal Analysis (MNA) Advantages • MNA can be applied to any circuit • Eqns can be assembled directly from input data • MNA matrix is close to Yn Limitations • Sometimes we have zeros on the main diagonal