CSE 140 Lecture 11 Standard Combinational Modules CK

CSE 140 Lecture 11 Standard Combinational Modules CK Cheng CSE Dept. UC San Diego 1

Part III - Standard Combinational Modules (Harris: 2. 8, 5) Signal Transport • Decoder: Decode address • Encoder: Encode address • Multiplexer (Mux): Select data by address • Demultiplexier (De. Mux): Direct data by address • Shifter: Shift bit location Data Operator • Adder: Add two binary numbers • Multiplier: Multiply two binary numbers 2

Interconnect: Decoder, Encoder, Mux, De. Mux Processors Arbiter Data 1 Mux Memory Bank P 1 Address 1 P 2 Address 2 Data Demux Mux Address n Address k Data k Pk n-m m 2 m Decoder: Decode the address to assert the addressed device Mux: Select the inputs according to the index addressed 3 by the control signals

1. Decoder • • Definition Logic Diagram Application (Universal Set) Tree of Decoders 4

i. Clicker: Decoder Definition A. A device that decodes B. An electronic device that converts signals from one form to another C. A machine that converts a coded text into ordinary language D. A device or program that translates encoded data into its original format E. All of the above 5

Decoder Definition: A digital module that converts a binary address to the assertion of the addressed device E (enable) I 0 0 I 1 1 I 2 2 n inputs n= 3 0 1 2 3 4 5 6 7 y 0 y 1 . . y 7 2 n outputs 23= 8 n to 2 n decoder function: yi = 1 if E= 1 & (I 2, I 1, I 0 ) = i yi= 0 otherwise 6

1. Decoder: Definition • N inputs, 2 N outputs • One-hot outputs: only one output HIGH at most E E= 1 7

Decoder: Logic Diagram E Output Expression: yi = E∙mi I 0 ’ I 1 ’ I 2 ’ y 0 I 0 ’ I 1 ’ I 2 y 1 y 0=1 if E=1 & (I 2, I 1, I 0)=(0, 0, 0) . . I 0 I 1 I 2 y 7=1 if E=1 & (I 2, I 1, I 0)=(1, 1, 1) 8

1. Decoder: Definition PI Q: What is the output Y 3: 0 of the 2: 4 decoder for (A 1, A 0) = (1, 0)? A. B. C. D. (1, 1, 0, 0 ) (1, 0, 1, 1) (0, 0, 1, 0) (0, 1, 0, 0) 9

Decoder Application: universal set {Decoder, OR} Example: Implement the following functions with a 3 -input decoder and OR gates. i) f 1(a, b, c) = Σm(1, 2, 4) ii) f 2(a, b, c) = Σm(2, 3), iii) f 3(a, b, c) = Σm(0, 5, 6) 10

Decoder Application: universal set {Decoder, OR} Decoder produces minterms when E=1. We can use an OR gate to collect the minterms to cover the On-set. For the Don’t Care-Set, we can just ignore the terms. 11

Decoder Application: universal set {Decoder, OR} Example: Implement functions i)f 1(a, b, c) = Σm(1, 2, 4) + Σd(0, 5), ii)f 2(a, b, c) = Σm(2, 3) + Σd(1, 4), iii)f 3(a, b, c) = Σm(0, 5, 6) y 1 with a 3 -input decoder and OR gates. y 2 E=1 c I 0 b I 1 a I 2 y 4 0 1 2 3 4 5 6 7 y 0 y 1. . y 7 f 1 y 2 y 3 f 2 y 0 y 5 y 6 f 3 12

Decoders • OR minterms E=1 13

Tree of Decoders: Scale up the size of the decoders using a tree structure Implement a 4 -24 decoder with 3 -23 decoders. d c b I 0 I 1 I 2 0 1 2 3 4 5 6 7 y 0 y 1 0 1 2 3 4 5 6 7 y 8 y 9 y 7 y 15 a 14

Tree of Decoders Implement a 6 -26 decoder with 3 -23 decoders. E I 2, I 1, I 0 I 5, I 4, I 3 I 2, I 1, I 0 E D 0 y 7 y 8 D 1 … y 15 … y 56 I 2, I 1, I 0 D 7 y 63 15

PI Q: A four variable switching function f(a, b, c, d) can be implemented using which of the following? A. B. C. D. E. 1: 2 decoders and OR gates 2: 4 decoders and OR gates 3: 8 decoders and OR gates All of the above None of the above 16

2. Encoder • Definition • Logic Diagram • Priority Encoder 17

i. Clicker: Definition of Encoder A. Any program, circuit or algorithm which encodes B. In digital audio technology, an encoder is a program that converts an audio WAV file into an MP 3 file C. A device that convert a message from plain text into code D. A circuit that is used to convert between digital video and analog video E. All of the above 18

Encoder Definition: A digital module that converts the assertion of a device to the binary address of the device. E I 2 n-1…I 0 yn-1 …y 0 A E I 0 I 7 8 inputs 0 1 2 3 4 5 6 7 0 1 2 A y 0 y 1 y 2 Encoder Description: At most one Ii = 1. (yn-1, . . , y 0 ) = i if Ii = 1 & E = 1 (yn-1, . . , y 0 ) = 0 otherwise. A = 1 if E = 1 and one i s. t. Ii = 1 A = 0 otherwise. 3 outputs 19

Encoder: Logic Diagram En En y 0 y 1 I 3 I 5 I 7 En I 2 I 3 I 6 I 7 En y 2 I 4 I 5 I 6 I 7 A I 0 I 1. . I 6 I 7 20

Priority Encoder: E I 0 0 1 0 y 0 1 y 1 2 I 3 3 Eo Gs 21

Priority Encoder: Definition Description: Input (I 2 n-1, …, I 0), Output (yn-1 , …, , y 0) = i if Ii = 1 & E = 1 & Ik = 0 for all k > i (high bit priority) or for all k< i (low bit priority). I 0 0 1 2 3 4 5 6 7 0 1 2 I 7 y 0 y 1 y 2 Eo = 1 if E = 1 & Ii = 0 for all i, Gs = 1 if E = 1 & i s. t. Ii = 1. E E (Gs is like A, and Eo passes on enable). Eo Gs 22

Priority Encoder: Implement a 32 -input priority encoder w/ 8 input priority encoders (high bit priority). E I 31 -24 y 32, y 31, y 30 Eo Gs I 25 -16 y 22, y 21, y 20 Eo Gs I 15 -8 y 12, y 11, y 10 Eo Gs I 7 -0 y 02, y 01, y 00 Eo Gs 23