CPSC 325 Compiler Tutorial 8 Code Generator unoptimized

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CPSC 325 - Compiler Tutorial 8 Code Generator (unoptimized)

CPSC 325 - Compiler Tutorial 8 Code Generator (unoptimized)

What is Code Generator?

What is Code Generator?

Intermediate Representation

Intermediate Representation

What Code Generator should do? l l Translate all the instructions in the intermediate

What Code Generator should do? l l Translate all the instructions in the intermediate representation to assembly language Allocate space for the variables, arrays etc. Create the necessary symbolic information Gather all of the necessary information

What does computer understand?

What does computer understand?

Assembly language l Advantages – – – Simplifies code generation due to use of

Assembly language l Advantages – – – Simplifies code generation due to use of symbolic instructions and symbolic names Logical abstraction layer Multiple Architectures can describe by a single assembly language l Can modify the implementation – l Macro assembly instructions Disadvantages – – Additional process of assembling and linking Assembler adds overhead

Assembly langauge l Relocatable machine language (object modules) – – – l All locations

Assembly langauge l Relocatable machine language (object modules) – – – l All locations (addresses) represented by symbols Mapped to memory addresses at link and load time Flexibility of separate compilation Absolute machine language – – Addresses are hard-coded Simple and straightforward implementation Inflexible – hard to reload generated code Used in interrupt handlers and device drivers

Assembly example

Assembly example

Modern CPU l l ALU Control Memory Registers Control ALU

Modern CPU l l ALU Control Memory Registers Control ALU

Arithmetic and Logic Unit (ALU) l l Performs most of the data operations Has

Arithmetic and Logic Unit (ALU) l l Performs most of the data operations Has the form: – l OP Rdest, Rsrc 1, Rsrc 2 Operations are: – – – Arithmetic operations (add, sub, mulo) Logical operations (and, sll) Comparison operations (seq, sge, slt)

Arithmetic and Logic Unit (ALU) l Many arithmetic operations can cause an exception –

Arithmetic and Logic Unit (ALU) l Many arithmetic operations can cause an exception – l Overflow and underflow Can operate on different data types – – – 8, 16, 32 bits Signed and unsigned arithmetic Floating-point operations (separate ALU)

Control l l Handles the instruction sequencing Executing instructions – – – All instructions

Control l l Handles the instruction sequencing Executing instructions – – – All instructions are in memory Fetch the instruction pointed by the PC and execute it For general instructions, increment the PC to point to the next location in memory

Control l Unconditional Branches – – Fetch the next instruction from a different location

Control l Unconditional Branches – – Fetch the next instruction from a different location Unconditional jump to an address l – Unconditional jump to an address in a register l – j label jr rsrc To handle procedure calls, do an unconditional jump, but save the next address in the current stream in a register l jal label jalr rsrc

Control l Conditional Branches – – Perform a test, if successful fetch instructions from

Control l Conditional Branches – – Perform a test, if successful fetch instructions from a new address, otherwise fetch the next instruction Instructions are of the form: l – brelop Rsrc 1, Rsrc 2, label relop is of the form: l eq, ne, gt, ge, lt, le

Control l Control transfer in special (rare) cases – – traps and exceptions Mechanism

Control l Control transfer in special (rare) cases – – traps and exceptions Mechanism l l l save the next (or current) instruction location find the address to jump to (from an exception vector) jump to that location

Others, additional information… l Please refer to your CPSC 231 text book… In the

Others, additional information… l Please refer to your CPSC 231 text book… In the book; there is all of the details.

Memory layout Stack Heap Data segment Text Segment Reserved

Memory layout Stack Heap Data segment Text Segment Reserved

Register 0 1 2– 3 4– 7 8 – 15 16 – 23 24

Register 0 1 2– 3 4– 7 8 – 15 16 – 23 24 – 25 28 29 30 31 zero at v 0 – v 1 a 0 – a 3 t 0 – t 7 s 0 – s 7 t 8, t 9 gp sp fp ra hard-wired to zero Reserved for asm expr. eval and return of result arguments 1 to 4 caller saved temporary calliee saved temporary caller saved temporary pointer to global area stack pointer frame pointer return address

Stack (cont. ) l Please refer to the hand out for more details. .

Stack (cont. ) l Please refer to the hand out for more details. .

Guidelines for the code generator l Lower the abstraction level slowly – Do many

Guidelines for the code generator l Lower the abstraction level slowly – Do many passes, that do few things (or one things) l l Keep the abstraction level consistent – IR should have ‘correct’ semantics at all time l l Easier to break the project down, generate and debug at least you should know the semantics Use assertions liberally – Use an assertion to check your assumption

Guidelines for the code generator l Do the simplest but dump thing – l

Guidelines for the code generator l Do the simplest but dump thing – l Make sure you know what can be done at… – – – l it is ok to generate 0 + 1*x + 0*y Compile time in the compiler Runtime in a runtime library Runtime using generated code Runtime library is your friend! – Don’t generate complex code sequences when it can be done in a runtime library assembly hack

Guidelines for the code generator l Remember that optimizations will come later – –

Guidelines for the code generator l Remember that optimizations will come later – – – l Let the optimizer do the optimizations Think about what optimizer will need and structure you code accordingly Example: Register allocation, algebraic simplification, constant propagation Setup a good testing program