CPS 110 Intro to memory Landon Cox Course

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CPS 110: Intro to memory Landon Cox

CPS 110: Intro to memory Landon Cox

Course administration êExam êTwo weeks from today êMostly concurrency ê 4 -5 questions (will

Course administration êExam êTwo weeks from today êMostly concurrency ê 4 -5 questions (will say more on Wed. )

Operating systems Applications OS Hardware

Operating systems Applications OS Hardware

Remember what a process is êThread êStream of execution (unit of concurrency) êProject 1,

Remember what a process is êThread êStream of execution (unit of concurrency) êProject 1, first month of class êAddress space êMemory space that threads use (unit of data) êProject 2, next two weeks of class

Address space abstraction êAddress space êAll memory data process uses to run êProgram code,

Address space abstraction êAddress space êAll memory data process uses to run êProgram code, stack, data segment êHardware software êAll processes share single small memory êOS applications êEach process has its own large memory

Hardware, OS interfaces Applications Job 1 Job 2 Job 3 CPU, Mem Hardware OS

Hardware, OS interfaces Applications Job 1 Job 2 Job 3 CPU, Mem Hardware OS Memory CPU

Illusions of the address space 1. Address independence êCan use same numeric address in

Illusions of the address space 1. Address independence êCan use same numeric address in 2 processes êEach process has its own version of “address 4” êEach “address 4” refers to different data items 2. Protection êOne process cannot touch another’s data 3. Virtual memory êAddress space can be larger than physical memory

Uni-programming ê 1 process occupies memory at a time êAlways load process into same

Uni-programming ê 1 process occupies memory at a time êAlways load process into same spot êMust reserve space for the OS fffff. . . 80000 7 ffff. . . 00000 (high memory) Operating system User process 1 (low memory)

Uni-programming êVirtual address êAddress programmer thinks she’s accessing êPhysical address êAddress from the view

Uni-programming êVirtual address êAddress programmer thinks she’s accessing êPhysical address êAddress from the view of the machine ê(actual physical memory location) êWhat is the V-to-P mapping in uniprogamming? êIdentity map (virtual A physical A)

Uni-programming êHow to run another process? êSwap user process 1 to disk êBring user

Uni-programming êHow to run another process? êSwap user process 1 to disk êBring user process 2 to memory êKernel scheduler swaps address spaces ê(when doing a context switch) êThis is how early PCs worked (badly)

Uni-programming êWhat features does this provide? êAddress independence êProtection êNo virtual memory êNote sum

Uni-programming êWhat features does this provide? êAddress independence êProtection êNo virtual memory êNote sum of address spaces > phys mem.

Uni-programming êProblems with uni-programming? êSwapping to/from disk is slow êMoves more data than might

Uni-programming êProblems with uni-programming? êSwapping to/from disk is slow êMoves more data than might be needed êWhat does this imply about RR slice? êHigh overhead for swapping large slice êLarge slice interactivity suffers

Multi-programming êMore than 1 process in phys memory êProcesses can have same virtual addrs

Multi-programming êMore than 1 process in phys memory êProcesses can have same virtual addrs êCannot share physical addrs êAddresses must be translated êStatically: occurs before execution êDynamically: occurs during execution êProtection is harder

Static address translation êWant two processes in memory êWith address independence êWithout translating on-the-fly

Static address translation êWant two processes in memory êWith address independence êWithout translating on-the-fly êMust use static translation êCould you do this?

Static address translation ê Adjust loads/stores when put in memory ê This is called

Static address translation ê Adjust loads/stores when put in memory ê This is called a linker-loader ê Programming ê Assume memory starts at 0 load $1, $base + offset ê Linker-loader ê Adds 0 x 20000 to offsets for P 2 ê Similar to linking phase of compile fffff. 80000. 3 ffff. . . 20000 1 ffff. . . 00000 (high memory) Operating system User process 2 User process 1 (low memory)

Linking your programs êCompiler generates. o files + libraries ê. o files all assume

Linking your programs êCompiler generates. o files + libraries ê. o files all assume they start at address 0 êLinker puts everything together êResolves cross-module references ê(e. g. “how do I jump to thread_create? ”) êSpits out single executable file

Multi-programming abstractions êAddress independence? êYes. (my address 4 is different from yours) êProtection? êNo.

Multi-programming abstractions êAddress independence? êYes. (my address 4 is different from yours) êProtection? êNo. êWhy not?

Multi-programming protection load $1, $base + offset ê Static translation changes the offset ê

Multi-programming protection load $1, $base + offset ê Static translation changes the offset ê Process could still issue odd register value êProblem êBuggy/malicious code can corrupt other processes êUser (not system) gets last move êWhy do we need dynamic addresses? êTo make pointers and arrays work

Multi-programming features êAddress independence? êYes. (my address 4 is different from yours) êProtection? êNo.

Multi-programming features êAddress independence? êYes. (my address 4 is different from yours) êProtection? êNo. êVirtual memory? êNo.

Multi-programming virtual memory êVirtual address space ≤ phys mem êProof: static translation cannot provide

Multi-programming virtual memory êVirtual address space ≤ phys mem êProof: static translation cannot provide VM êEach VA maps to a fixed PA ê(one-to-one mapping) êThus, # of VAs must equal # of PAs ê(but we want more VAs than PAs) êOur goals require dynamic translation

Dynamic address translation User process Virtual address Translator (MMU) Physical address Will this allow

Dynamic address translation User process Virtual address Translator (MMU) Physical address Will this allow us to provide protection? Sure, as long as the translation is correct Physical memory

Dynamic address translation User process Virtual address Translator (MMU) Physical address Physical memory This

Dynamic address translation User process Virtual address Translator (MMU) Physical address Physical memory This is an example of a systems service called “naming”. Can you think of other examples, that you use everyday? Internet DNS (Domain Name Service) File System (human-readable names to blocks on disk)

Dynamic address translation User process Virtual address Translator (MMU) Physical address Physical memory How

Dynamic address translation User process Virtual address Translator (MMU) Physical address Physical memory How does Java use naming to provide protection? What exactly is Java trying to protect (and from what)? Has programming in C++ changed your opinion of Java? Does learning Java or C++ make you a better programmer?

Dynamic address translation ê Does this enable virtual memory? êYes ê VA only needs

Dynamic address translation ê Does this enable virtual memory? êYes ê VA only needs to be in phys mem when accessed ê Provides flexibility êTranslations can change on-the-fly êDifferent VAs can occupy different PAs ê Common technique êAdd level of indirection to gain flexibility

Hardware support êTraditional view êDynamic translation needs hardware support êAgree or disagree? êBasic requirement

Hardware support êTraditional view êDynamic translation needs hardware support êAgree or disagree? êBasic requirement êMust translate each load/store êCould do this via software simulation êJVM does a lot of the work of the MMU

Dynamic address translation User process Virtual address Translator (MMU) Physical address ê Translator: just

Dynamic address translation User process Virtual address Translator (MMU) Physical address ê Translator: just a data structure ê Tradeoffs êFlexibility (sharing, growth, virtual memory) êSize of translation data êSpeed of translation Physical memory

1. Base and bounds êFor each process êSingle contiguous region of phys mem êNot

1. Base and bounds êFor each process êSingle contiguous region of phys mem êNot allowed to access outside of region êIllusion own physical mem [0, bound)

1. Base and bounds Looks a lot like the linker-loader. What is different? No

1. Base and bounds Looks a lot like the linker-loader. What is different? No rewriting. Every access goes through translator. (system gets the last move) Bound Size of phys mem Base + Bound Base 0 Virtual memory 0 Physical memory

1. Base and bounds êTranslator algorithm if (virtual address > bound) { trap to

1. Base and bounds êTranslator algorithm if (virtual address > bound) { trap to kernel can kill process with segmentation fault } else { physical address = virtual address + base } êOnly kernel can change base, bound

1. Base and bounds êWhat happens on a context switch? êMust translate addresses differently

1. Base and bounds êWhat happens on a context switch? êMust translate addresses differently êLoad translation data for new process êSet base and bounds registers

1. Base and bounds ê How can address spaces grow? êIf memory above base+bound

1. Base and bounds ê How can address spaces grow? êIf memory above base+bound is free êIncrease the bound êIf memory above base+bound isn’t free êStop program êCopy data êChange base and bounds êRestart process Base + Bound Base ê Does being moved affect the program? êNo, it still only knows about virtual addresses 0

Base and bounds pros and cons ê Pros êLow hardware costs (2 registers, adder,

Base and bounds pros and cons ê Pros êLow hardware costs (2 registers, adder, comparator) êFast (only inserting addition and comparison) ê Cons êSingle address space can’t easily exceed size of phys mem êGrowing virtual address space might be slow êSharing is difficult (must share all or nothing)

Base and bounds sharing Why can’t IE 1 and IE 2 share the same

Base and bounds sharing Why can’t IE 1 and IE 2 share the same code segment? Size of phys mem Base + Bound Base 0 0 Virtual memory (IE 1) 0 Physical memory Virtual memory (IE 2)

Base and bounds pros and cons ê Pros êLow hardware costs (2 registers, adder,

Base and bounds pros and cons ê Pros êLow hardware costs (2 registers, adder, comparator) êFast (only inserting addition and comparison) ê Cons êSingle address space can’t easily exceed size of phys mem êGrowing virtual address space might be slow êSharing is difficult (must share all or nothing) êWaste memory due to external fragmentation

Base and bounds fragmentation 1 MB P 4 300 KB P 6 600 KB

Base and bounds fragmentation 1 MB P 4 300 KB P 6 600 KB P 3 P 5 External fragmentation Heuristics to minimize • Best fit (Allocate in smallest free region) • First fit (Use first region that fits) P 2 P 1 400 KB 300 KB 100 KB 0 Physical memory

Base and bounds pros and cons ê Pros êLow hardware costs (2 registers, adder,

Base and bounds pros and cons ê Pros êLow hardware costs (2 registers, adder, comparator) êFast (only inserting addition and comparison) ê Cons êSingle address space can’t easily exceed size of phys mem êSharing is difficult (must share all or nothing) êGrowing virtual address space might be slow êWaste memory due to external fragmentation êHard to grow multiple regions of memory

Base and bounds growth êWhat grows in a process? êThe stack and heap New

Base and bounds growth êWhat grows in a process? êThe stack and heap New bound frame stack frame P 1

Base and bounds growth êWhat grows in a process? êThe stack and heap êHow

Base and bounds growth êWhat grows in a process? êThe stack and heap êHow do you do this with both? êIf heap grows, extend P 1’s bound êIf stack grows, must shift heap up heap stack êWhat about pointers into heap? New data on heap at VA 100 (translated to PA 100+base) Store this address in a variable How can you shift VAs up? VA 100 P 1 Problem: must fit two growing data structures in one contiguous region

Next class êSegmentation instead of base and bounds êWhere “segmentation fault” comes from êGood

Next class êSegmentation instead of base and bounds êWhere “segmentation fault” comes from êGood luck wrapping up Project 1