Cpr E 281 Digital Logic Instructor Alexander Stoytchev

Analysis of Synchronous Sequential Circuits Cpr. E 281: Digital Logic Iowa State University, Ames,

Administrative Stuff • Homework 11 is due today

Administrative Stuff • Homework 12 is out • It is due on Monday Dec

Administrative Stuff • Final Project (7% of your grade) • By now you should

Reading Material for next Monday • “The Seven Secrets of Computer Power Revealed” by

Goal for Today's Lecture • Given a circuit diagram for a synchronous sequential circuit,

What does this circuit do? [ Figure 6. 75 from the textbook ]

Approach • Find the flip-flops • Outputs of the flip-flops = present state variables

Where are the inputs? [ Figure 6. 75 from the textbook ]

Where are the inputs? There is only one input [ Figure 6. 75 from

Where are the outputs? [ Figure 6. 75 from the textbook ]

Where are the outputs? There is only one output [ Figure 6. 75 from

Where kind of machine is this? Moore or Mealy? output input

Moore: because the output does not depend directly on the primary input output input

Where are the outputs of the flip-flops?

What are their logic expressions? Y 1 = wy 1 + wy 2 Y

What is its logic expression? z = y 1 y 2

This is what we have to work with now (we don’t need the circuit

Let’s derive the state-assigned table Y 1 = wy 1 + wy 2 Y

We don’t need the logic expressions anymore Y 1 = wy 1 + wy

We don’t need the logic expressions anymore Next State Present state w = 0

Let’s derive the state table Next state Present state w= 0 w= 1 Output

Let’s derive the state table Next state Present state w= 0 w= 1 A

The two tables for the initial circuit Next state Present state w= 0 w=

We don’t need the state-assigned table anymore Next state Present state w= 0 w=

Let’s Draw the State Diagram Next state Present state w= 0 w= 1 A

Let’s Draw the State Diagram A/0 Next state Present state w= 0 w= 1

Let’s Draw the State Diagram w=0 A/0 Next state Present state w= 0 w=

We are done! w=0 A/0 Next state Present state w= 0 w= 1 A

Almost done. What does this FSM do? w=0 A/0 Next state Present state w=

Almost done. What does this FSM do? It sets the output z to 1

What does this circuit do? J 1 w K 1 J 2 J Q

Where are the inputs and outputs? J 1 w K 1 J 2 J

Where are the inputs and outputs? J 1 w input K 1 J 2

What kind of machine is this? J 1 w input K 1 J 2

Where are the flip-flops? J 1 w K 1 J 2 J Q K

Where are the outputs of the flip-flops? J 1 w K 1 J 2

These are the next-state variables J 1 w K 1 J 2 J Q

Where are the inputs of the flip-flops? J 1 w K 1 J 2

What are their logic expressions? J 1 w K 1 J 2 J Q

What are their logic expressions? J 1 = w J 1 w K 1

What is the logic expression of the output? J 1 w K 1 J

Let’s derive the excitation table J 1 = w K 1 = w +

The excitation table J 1 = w K 1 = w + y 2

We don’t need the logic expressions anymore J 1 = w K 1 =

We don’t need the logic expressions anymore Present state y 2 y 1 00

Let’s derive the state table Next state Present state w= 0 w= 1 State

JK Flip-Flop Refresher D = JQ + KQ [ Figure 5. 16 a from

JK Flip-Flop Refresher J D K Q Q Clock (a) Circuit J K Q

The state diagram w=0 A/0 Next state Present state w= 0 w= 1 A

The state diagram w=0 Thus, this FSM is identical to the one in the

Yet Another Example (with mixed flip-flops)

What does this circuit do? [ Figure 6. 79 from the textbook ]

What are the logic expressions? [ Figure 6. 79 from the textbook ]

What are the logic expressions? D 1 = w (y 1 + y 2)

The Excitation Table D 1 = w (y 1 + y 2) T 2

The state diagram w=0 Thus, this FSM is identical to the ones in the

Slides: 139

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Cpr. E 281: Digital Logic Instructor: Alexander Stoytchev http: //www. ece. iastate. edu/~alexs/classes/

Administrative Stuff • Homework 11 is due today

Administrative Stuff • Homework 12 is out • It is due on Monday Dec 8, 2014 @ 4 pm

Administrative Stuff • Final Project (7% of your grade) • By now you should have selected a project • Also, posted on the class web page (Labs section) • This is your lab for the next two weeks • This is due during your last lab (next week)

Reading Material for next Monday • “The Seven Secrets of Computer Power Revealed” by Daniel Dennett. • This is Chapter 24 in his latest book “Intuition Pumps and Other Tools for Thinking”, 2013

Goal for Today's Lecture • Given a circuit diagram for a synchronous sequential circuit, the goal is to figure out the FSM • Figure out the present state variables, the next state variables, the state-assigned table, the state table, and finally the state diagram. • In other words, the goal is to reverse engineer the circuit.

What does this circuit do? [ Figure 6. 75 from the textbook ]

Approach • Find the flip-flops • Outputs of the flip-flops = present state variables • Inputs of the flip-flops determine the next state variables • Determine the logical expressions for the outputs • Given this info it is easy to do the state-assigned table • Next do the state table • Finally, draw the state diagram.

Where are the inputs? [ Figure 6. 75 from the textbook ]

Where are the inputs? There is only one input [ Figure 6. 75 from the textbook ]

Where are the outputs? [ Figure 6. 75 from the textbook ]

Where are the outputs? There is only one output [ Figure 6. 75 from the textbook ]

Where kind of machine is this? Moore or Mealy? output input

Moore: because the output does not depend directly on the primary input output input

Where are the memory elements?

Where are the outputs of the flip-flops?

These are the present-state variables

Where are the inputs of the flip-flops?

These are the next-state variables

What are their logic expressions?

What are their logic expressions? Y 1 = wy 1 + wy 2 Y 2 = wy 1 + wy 2

Where is the output, again?

What is its logic expression?

What is its logic expression? z = y 1 y 2

This is what we have to work with now (we don’t need the circuit anymore) Y 1 = wy 1 + wy 2 Y 2 = wy 1 + wy 2 z = y 1 y 2

Let’s derive the state-assigned table Y 1 = wy 1 + wy 2 Y 2 = wy 1 + wy 2 z = y 1 y 2 Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 Output z

Let’s derive the state-assigned table Y 1 = wy 1 + wy 2 Y 2 = wy 1 + wy 2 z = y 1 y 2 Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 Output z 0 0 0 1

Let’s derive the state-assigned table Y 1 = wy 1 + wy 2 Y 2 = wy 1 + wy 2 z = y 1 y 2 Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 0 0 Y 2 Y 1 1 0 1 1 Output z 0 0 0 1

Let’s derive the state-assigned table Y 1 = wy 1 + wy 2 Y 2 = wy 1 + wy 2 z = y 1 y 2 Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 00 00 01 10 11 11 Output z 0 0 0 1

We don’t need the logic expressions anymore Y 1 = wy 1 + wy 2 Y 2 = wy 1 + wy 2 z = y 1 y 2 Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 00 00 01 10 11 11 Output z 0 0 0 1

We don’t need the logic expressions anymore Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 00 00 01 10 11 11 Output z 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 Output z Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 State table Y 2 Y 1 00 00 01 10 11 11 Output State-assigned table z 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 Output z Next State Present state w = 0 w = 1 y 2 y 1 A B C D 00 01 10 11 State table Y 2 Y 1 00 00 01 10 11 11 Output State-assigned table z 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D A A State table Output z Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 00 00 01 10 11 11 Output State-assigned table z 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D A A B C D D State table Output z Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 00 00 01 10 11 11 Output State-assigned table z 0 0 0 1

The two tables for the initial circuit Next state Present state w= 0 w= 1 A B C D A A B C D D State table Output z 0 0 0 1 Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 00 00 01 10 11 11 Output z 0 0 0 1 State-assigned table [ Figure 6. 76 from the textbook ]

We don’t need the state-assigned table anymore Next state Present state w= 0 w= 1 A B C D A A B C D D State table Output z 0 0 0 1 Next State Present state w = 0 w = 1 y 2 y 1 00 01 10 11 Y 2 Y 1 00 00 01 10 11 11 Output z 0 0 0 1 State-assigned table [ Figure 6. 76 from the textbook ]

We don’t need the state-assigned table anymore Next state Present state w= 0 w= 1 A B C D A A B C D D State table Output z 0 0 0 1

Let’s Draw the State Diagram Next state Present state w= 0 w= 1 A B C D A A B C D D Output z 0 0 0 1

Let’s Draw the State Diagram A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output z 0 0 0 1 B/0 C/0 Because this is a Moore machine the output is tied to the state D/1

Let’s Draw the State Diagram A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output z 0 0 0 1 B/0 C/0 All transitions when the input w is equal to 1 D/1

Let’s Draw the State Diagram A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output z 0 0 0 1 w=1 B/0 w=1 C/0 All transitions when the input w is equal to 1 w=1 D/1 w=1

Let’s Draw the State Diagram A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output z 0 0 0 1 w=1 B/0 w=1 C/0 All transitions when the input w is equal to 0 w=1 D/1 w=1

Let’s Draw the State Diagram w=0 A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output w=1 z 0 0 0 1 w=0 B/0 w=1 w=0 All transitions when the input w is equal to 0 C/0 w=1 w=0 D/1 w=1

We are done! w=0 A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output w=1 z 0 0 0 1 w=0 B/0 w=1 w=0 State table C/0 w=1 w=0 D/1 State diagram w=1

Almost done. What does this FSM do? w=0 A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output w=1 z 0 0 0 1 w=0 B/0 w=1 w=0 State table C/0 w=1 w=0 D/1 State diagram w=1

Almost done. What does this FSM do? It sets the output z to 1 when three consecutive 1’s occur on the input w. In other words, it is a sequence detector for the input pattern 111. Next state Present state w= 0 w= 1 A B C D A A B C D D w=0 A/0 Output w=1 z 0 0 0 1 w=0 B/0 w=1 w=0 State table C/0 w=1 w=0 D/1 State diagram w=1

Another Example (with JK flip-flops)

What does this circuit do? J 1 w K 1 J 2 J Q K Q y 1 z y 2 Clock K 2 Resetn [ Figure 6. 77 from the textbook ]

Where are the inputs and outputs? J 1 w K 1 J 2 J Q K Q y 1 z y 2 Clock K 2 Resetn [ Figure 6. 77 from the textbook ]

Where are the inputs and outputs? J 1 w input K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z output y 2

What kind of machine is this? J 1 w input K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z output y 2

Where are the flip-flops? J 1 w K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z y 2

Where are the outputs of the flip-flops? J 1 w K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z y 2

These are the next-state variables J 1 w K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z y 2

Where are the inputs of the flip-flops? J 1 w K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z y 2

What are their logic expressions? J 1 w K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z y 2

What are their logic expressions? J 1 = w J 1 w K 1 = w + y 2 J 2 = w y 1 K 1 J 2 J Q K Q Clock K 2 Resetn K 2 = w y 1 z y 2

What is the logic expression of the output? J 1 w K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z output y 2

What is the logic expression of the output? J 1 w K 1 J 2 J Q K Q Clock K 2 Resetn y 1 z = y 1 y 2 z output y 2

This is what we have to work with now (we don’t need the circuit anymore) J 1 = w K 1 = w + y 2 J 2 = w y 1 K 2 = w z = y 1 y 2

Let’s derive the excitation table J 1 = w K 1 = w + y 2 J 2 = w y 1 K 2 = w z = y 1 y 2 Present state y 2 y 1 00 01 10 11 Flip-flop inputs w= 0 J 2 K 2 J 1 K 1 w= 1 J 2 K 2 J 1 K 1 Output z

Let’s derive the excitation table J 1 = w K 1 = w + y 2 J 2 = w y 1 K 2 = w z = y 1 y 2 Present state y 2 y 1 00 01 10 11 Flip-flop inputs w= 0 J 2 K 2 J 1 K 1 w= 1 J 2 K 2 J 1 K 1 Output z 0 0 0 1

Let’s derive the excitation table J 1 = w K 1 = w + y 2 J 2 = w y 1 K 2 = w z = y 1 y 2 Present state y 2 y 1 00 01 10 11 Flip-flop inputs w= 0 J 2 K 2 J 1 K 1 01 01 w= 1 J 2 K 2 J 1 K 1 11 11 10 10 Output z 0 0 0 1

The excitation table J 1 = w K 1 = w + y 2 J 2 = w y 1 K 2 = w Present state y 2 y 1 00 01 10 11 Flip-flop inputs w= 0 w= 1 J 2 K 2 J 1 K 1 01 01 00 10 11 11 10 10 Output z 0 0 0 1 z = y 1 y 2 [ Figure 6. 78 from the textbook ]

We don’t need the logic expressions anymore J 1 = w K 1 = w + y 2 J 2 = w y 1 K 2 = w Present state y 2 y 1 00 01 10 11 Flip-flop inputs w= 0 w= 1 J 2 K 2 J 1 K 1 01 01 00 10 11 11 10 10 Output z 0 0 0 1 z = y 1 y 2 [ Figure 6. 78 from the textbook ]

We don’t need the logic expressions anymore Present state y 2 y 1 00 01 10 11 Flip-flop inputs w= 0 w= 1 J 2 K 2 J 1 K 1 01 01 00 10 11 11 10 10 Output z 0 0 0 1 [ Figure 6. 78 from the textbook ]

Let’s derive the state table Next state Present state w= 0 w= 1 State table Output z Excitation table

Let’s derive the state table Next state Present state w= 0 w= 1 Output z A B C D State table This step is easy (map 2 -bit numbers to 4 letters) Excitation table

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D Output z 0 0 0 1 State table This step is easy too (the outputs are the same in both tables) Excitation table

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D ? Output z 0 0 0 1 State table How should we do this? Excitation table

JK Flip-Flop Refresher D = JQ + KQ [ Figure 5. 16 a from the textbook ]

JK Flip-Flop Refresher J D K Q Q Clock (a) Circuit J K Q ( t + 1) 0 0 1 1 0 1 Q (t) 0 1 Q (t ) (b) Truth table J Q K Q (c) Graphical symbol [ Figure 5. 16 from the textbook ]

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D ? Output z 0 0 0 1 State table How should we do this? Excitation table

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D Output z 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 Output A 0 0 0 1 A B C D Note that A = 00 z

Let’s derive the state table Next state Present state w= 0 w= 1 Output A 0 0 0 1 A B C D ? z

Let’s derive the state table Next state Present state w= 0 w= 1 Output A 0 0 0 1 A B C D z

Let’s derive the state table Next state Present state w= 0 w= 1 Output A 0 0 0 1 A B C D z =1=0

Let’s derive the state table Next state Present state w= 0 w= 1 Output A 0 0 0 1 A B C D C z Note that C = 10 =0

The two tables for the initial circuit Next state Present state w= 0 w= 1 A B C D A A B C D D State table Output z 0 0 0 1 Excitation table

The state diagram w=0 A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output w=1 z 0 0 0 1 w=0 B/0 w=1 w=0 State table C/0 w=1 w=0 D/1 State diagram w=1

The state diagram w=0 Thus, this FSM is identical to the one in the previous example, even though the circuit uses JK flip-flops. A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output w=1 z 0 0 0 1 w=0 B/0 w=1 w=0 State table C/0 w=1 w=0 D/1 State diagram w=1

Yet Another Example (with mixed flip-flops)

What does this circuit do? [ Figure 6. 79 from the textbook ]

What are the logic expressions? [ Figure 6. 79 from the textbook ]

What are the logic expressions?

What are the logic expressions? D 1 = w (y 1 + y 2) z = y 1 y 2 T 2 = w y 2 + w y 1 y 2

The Excitation Table D 1 = w (y 1 + y 2) T 2 = w y 2 + w y 1 y 2 z = y 1 y 2 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 Excitation table 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 Output z Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 Output z A B C D This step is easy (map 2 -bit numbers to 4 letters) Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D Output z 0 0 0 1 This step is easy too (the outputs are the same in both tables) Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 Output ? 0 0 0 1 A B C D z What should we do here? Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D Output z 0 0 0 1 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D Output z 0 0 0 1 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 0 01 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D A Output z 0 0 0 1 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 Note that A = 00 0 01 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D A ? Output z 0 0 0 1 What should we do here? Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D A Output z 0 0 0 1 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D A Output z 0 0 0 1 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 1 01 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D A D Output z 0 0 0 1 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 Note that D = 11 1 01 10 01 01 0 0 0 1

Let’s derive the state table Next state Present state w= 0 w= 1 A B C D A A B C D D Output z 0 0 0 1 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 0 0 0 1

The two tables for the initial circuit Next state Present state w= 0 w= 1 A B C D A A B C D D Output z 0 0 0 1 Present Flip-flop inputs Output state w = 0 w = 1 z y 2 y 1 T 2 D 1 00 01 10 11 00 00 10 10 01 01 State table Excitation table [ Figure 6. 75 b from the textbook ] [ Figure 6. 80 from the textbook ] 0 0 0 1

The state diagram w=0 A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output w=1 z 0 0 0 1 w=0 B/0 w=1 w=0 State table C/0 w=1 w=0 D/1 State diagram w=1

The state diagram w=0 Thus, this FSM is identical to the ones in the previous examples, even though the circuit uses one D and one T flip-flop. A/0 Next state Present state w= 0 w= 1 A B C D A A B C D D Output w=1 z 0 0 0 1 w=0 B/0 w=1 w=0 State table C/0 w=1 w=0 D/1 State diagram w=1

Questions?

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