Computer Systems Overview Operating System n Exploits the

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Computer Systems Overview

Computer Systems Overview

Operating System n Exploits the hardware resources of one or more processors n Provides

Operating System n Exploits the hardware resources of one or more processors n Provides a set of services to system users n Manages secondary memory and I/O devices Page 2 W. Stallings: Operating Systems: Internals and Design, © 2001

Basic Elements n Processor n Main Memory volatile referred to as real memory or

Basic Elements n Processor n Main Memory volatile referred to as real memory or primary memory n I/O modules l secondary memory devices l communications equipment l terminals n System bus l communication among processors, memory, and I/O modules l l Page 3 W. Stallings: Operating Systems: Internals and Design, © 2001

Processor n Two internal registers l Memory address register (MAR) 4 Specifies the address

Processor n Two internal registers l Memory address register (MAR) 4 Specifies the address for the next read or write l Memory buffer register (MBR) 4 Contains data written into memory or receives data read from memory l I/O address register l I/O buffer register Page 4 W. Stallings: Operating Systems: Internals and Design, © 2001

Top-Level Components Page 5 W. Stallings: Operating Systems: Internals and Design, © 2001

Top-Level Components Page 5 W. Stallings: Operating Systems: Internals and Design, © 2001

Processor Registers n User-visible registers l Enable programmer to minimize main-memory references by optimizing

Processor Registers n User-visible registers l Enable programmer to minimize main-memory references by optimizing register use n Control and status registers l l Used by processor to control operation of the processor Used by privileged operating-system routines to control the execution of programs Page 6 W. Stallings: Operating Systems: Internals and Design, © 2001

User-Visible Registers n May be referenced by machine language n Available to all programs

User-Visible Registers n May be referenced by machine language n Available to all programs - application programs and system programs n Types of registers l l Data Address 4 Index 4 Segment pointer 4 Stack pointer Page 7 W. Stallings: Operating Systems: Internals and Design, © 2001

User-Visible Registers n Address Registers l Index 4 Involves l adding an index to

User-Visible Registers n Address Registers l Index 4 Involves l adding an index to a base value to get an address Segment pointer 4 When memory is divided into segments, memory is referenced by a segment and an offset l Stack pointer 4 Points to top of stack Page 8 W. Stallings: Operating Systems: Internals and Design, © 2001

Control and Status Registers n Program Counter (PC) l Contains the address of an

Control and Status Registers n Program Counter (PC) l Contains the address of an instruction to be fetched n Instruction Register (IR) l Contains the instruction most recently fetched n Program Status Word (PSW) l l l Condition codes Interrupt enable/disable Supervisor/user mode Page 9 W. Stallings: Operating Systems: Internals and Design, © 2001

Control and Status Registers n Condition Codes or Flags l l Bits set by

Control and Status Registers n Condition Codes or Flags l l Bits set by the processor hardware as a result of operations Examples 4 Positive result 4 Negative result 4 Zero 4 Overflow Page 10 W. Stallings: Operating Systems: Internals and Design, © 2001

Instruction Execution n Two steps l Processor reads instructions from memory 4 Fetches l

Instruction Execution n Two steps l Processor reads instructions from memory 4 Fetches l Processor executes each instruction Page 11 W. Stallings: Operating Systems: Internals and Design, © 2001

Instruction Cycle Page 12 W. Stallings: Operating Systems: Internals and Design, © 2001

Instruction Cycle Page 12 W. Stallings: Operating Systems: Internals and Design, © 2001

Instruction Fetch and Execute n The processor fetches the instruction from memory n Program

Instruction Fetch and Execute n The processor fetches the instruction from memory n Program counter (PC) holds address of the instruction to be fetched next n Program counter is incremented after each fetch Page 13 W. Stallings: Operating Systems: Internals and Design, © 2001

Instruction Register n Fetched instruction is placed in the instruction register n Categories l

Instruction Register n Fetched instruction is placed in the instruction register n Categories l Processor-memory 4 Transfer l Processor-I/O 4 Data l data between processor and memory transferred to or from a peripheral device Data processing 4 Arithmetic l or logic operation on data Control 4 Alter sequence of execution Page 14 W. Stallings: Operating Systems: Internals and Design, © 2001

Characteristics of a Hypothetical Machine Page 15 W. Stallings: Operating Systems: Internals and Design,

Characteristics of a Hypothetical Machine Page 15 W. Stallings: Operating Systems: Internals and Design, © 2001

Example of Program Execution Page 16 W. Stallings: Operating Systems: Internals and Design, ©

Example of Program Execution Page 16 W. Stallings: Operating Systems: Internals and Design, © 2001

Direct Memory Access (DMA) n I/O exchanges occur directly with memory n Processor grants

Direct Memory Access (DMA) n I/O exchanges occur directly with memory n Processor grants I/O module authority to read from or write to memory n Relieves the processor responsibility for the exchange Page 17 W. Stallings: Operating Systems: Internals and Design, © 2001

Interrupts n Interrupt the normal sequencing of the processor n Most I/O devices are

Interrupts n Interrupt the normal sequencing of the processor n Most I/O devices are slower than the processor l Processor must pause to wait for device Page 18 W. Stallings: Operating Systems: Internals and Design, © 2001

Classes of Interrupts Page 19 W. Stallings: Operating Systems: Internals and Design, © 2001

Classes of Interrupts Page 19 W. Stallings: Operating Systems: Internals and Design, © 2001

Program Flow of Control Without Interrupts Page 20 W. Stallings: Operating Systems: Internals and

Program Flow of Control Without Interrupts Page 20 W. Stallings: Operating Systems: Internals and Design, © 2001

Program Flow of Control With Interrupts, Short I/O Wait Page 21 W. Stallings: Operating

Program Flow of Control With Interrupts, Short I/O Wait Page 21 W. Stallings: Operating Systems: Internals and Design, © 2001

Program Flow of Control With Interrupts; Long I/O Wait Page 22 W. Stallings: Operating

Program Flow of Control With Interrupts; Long I/O Wait Page 22 W. Stallings: Operating Systems: Internals and Design, © 2001

Interrupt Handler n Program to service a particular I/O device n Generally part of

Interrupt Handler n Program to service a particular I/O device n Generally part of the operating system Page 23 W. Stallings: Operating Systems: Internals and Design, © 2001

Interrupts n Suspends the normal sequence of execution Page 24 W. Stallings: Operating Systems:

Interrupts n Suspends the normal sequence of execution Page 24 W. Stallings: Operating Systems: Internals and Design, © 2001

Interrupt Cycle Page 25 W. Stallings: Operating Systems: Internals and Design, © 2001

Interrupt Cycle Page 25 W. Stallings: Operating Systems: Internals and Design, © 2001

Interrupt Cycle n Processor checks for interrupts n If no interrupts fetch the next

Interrupt Cycle n Processor checks for interrupts n If no interrupts fetch the next instruction for the current program n If an interrupt is pending, suspend execution of the current program, and execute the interrupt-handler routine Page 26 W. Stallings: Operating Systems: Internals and Design, © 2001

Timing Diagram Based on Short I/O Wait Page 27 W. Stallings: Operating Systems: Internals

Timing Diagram Based on Short I/O Wait Page 27 W. Stallings: Operating Systems: Internals and Design, © 2001

Timing Diagram Based on Short I/O Wait Page 28 W. Stallings: Operating Systems: Internals

Timing Diagram Based on Short I/O Wait Page 28 W. Stallings: Operating Systems: Internals and Design, © 2001

Simple Interrupt Processing Page 29 W. Stallings: Operating Systems: Internals and Design, © 2001

Simple Interrupt Processing Page 29 W. Stallings: Operating Systems: Internals and Design, © 2001

Changes in Memory and Registers for an Interrupt Page 30 W. Stallings: Operating Systems:

Changes in Memory and Registers for an Interrupt Page 30 W. Stallings: Operating Systems: Internals and Design, © 2001

Changes in Memory and Registers for an Interrupt Page 31 W. Stallings: Operating Systems:

Changes in Memory and Registers for an Interrupt Page 31 W. Stallings: Operating Systems: Internals and Design, © 2001

Multiple Interrupts n Disable interrupts while an interrupt is being processed Page 32 W.

Multiple Interrupts n Disable interrupts while an interrupt is being processed Page 32 W. Stallings: Operating Systems: Internals and Design, © 2001

Multiple Nested Interrupts n Define priorities for interrupts Page 33 W. Stallings: Operating Systems:

Multiple Nested Interrupts n Define priorities for interrupts Page 33 W. Stallings: Operating Systems: Internals and Design, © 2001

Multiple Interrupts Page 34 W. Stallings: Operating Systems: Internals and Design, © 2001

Multiple Interrupts Page 34 W. Stallings: Operating Systems: Internals and Design, © 2001

Multiprogramming n Processor has more than one program to execute n The sequence the

Multiprogramming n Processor has more than one program to execute n The sequence the programs are executed depend on their relative priority and whether they are waiting for I/O n After an interrupt handler completes, control may not return to the program that was executing at the time of the interrupt Page 35 W. Stallings: Operating Systems: Internals and Design, © 2001

Memory Hierarchy n Faster access time, greater cost per bit n Greater capacity, smaller

Memory Hierarchy n Faster access time, greater cost per bit n Greater capacity, smaller cost per bit n Greater capacity, slower access speed Page 36 W. Stallings: Operating Systems: Internals and Design, © 2001

Going Down the Hierarchy n n Decreasing cost per bit Increasing capacity Increasing access

Going Down the Hierarchy n n Decreasing cost per bit Increasing capacity Increasing access time Decreasing frequency of access of the memory by the processor l Locality of reference Page 37 W. Stallings: Operating Systems: Internals and Design, © 2001

Secondary Memory n Nonvolatile n Auxiliary memory n Used to store program and data

Secondary Memory n Nonvolatile n Auxiliary memory n Used to store program and data files Page 38 W. Stallings: Operating Systems: Internals and Design, © 2001

Disk Cache n A portion of main memory used as a buffer to temporarily

Disk Cache n A portion of main memory used as a buffer to temporarily to hold data for the disk n Disk writes are clustered n Some data written out may be referenced again. The data are retrieved rapidly from the software cache instead of slowly from disk Page 39 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Memory n Invisible to operating system n Increase the speed of memory n

Cache Memory n Invisible to operating system n Increase the speed of memory n Processor speed is faster than memory speed n Exploit the principle of locality Page 40 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Memory Page 41 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Memory Page 41 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Memory n Contains a copy of a portion of main memory n Processor

Cache Memory n Contains a copy of a portion of main memory n Processor first checks cache n If not found in cache, the block of memory containing the needed information is moved to the cache and delivered to the processor Page 42 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache/Main Memory System Page 43 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache/Main Memory System Page 43 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Read Operation Page 44 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Read Operation Page 44 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Design n Cache size l Small caches have a significant impact on performance

Cache Design n Cache size l Small caches have a significant impact on performance n Block size l l The unit of data exchanged between cache and main memory Larger block size more hits until probability of using newly fetched data becomes less than the probability of reusing data that have to be moved out of cache Page 45 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Design n Mapping function l Determines which cache location the block will occupy

Cache Design n Mapping function l Determines which cache location the block will occupy n Replacement algorithm l l Determines which block to replace Least-Recently-Used (LRU) algorithm Page 46 W. Stallings: Operating Systems: Internals and Design, © 2001

Cache Design n Write policy When the memory write operation takes place l Can

Cache Design n Write policy When the memory write operation takes place l Can occur every time block is updated l Can occur only when block is replaced l 4 Minimizes memory write operations 4 Leaves main memory in an obsolete state Page 47 W. Stallings: Operating Systems: Internals and Design, © 2001

Programmed I/O n I/O module performs the action, not the processor n Sets appropriate

Programmed I/O n I/O module performs the action, not the processor n Sets appropriate bits in the I/O status register n No interrupts occur n Processor checks status until operation is complete Page 48 W. Stallings: Operating Systems: Internals and Design, © 2001

Interrupt-Driven I/O n Processor is interrupted when I/O module ready to exchange data n

Interrupt-Driven I/O n Processor is interrupted when I/O module ready to exchange data n Processor saves context of program executing and begins executing interrupt-handler n No needless waiting n Consumes a lot of processor time because every word read or written passes through the processor Page 49 W. Stallings: Operating Systems: Internals and Design, © 2001

Direct Memory Access n Transfers a block of data directly to or from memory

Direct Memory Access n Transfers a block of data directly to or from memory n An interrupt is sent when the transfer is complete n Processor continues with other work Page 50 W. Stallings: Operating Systems: Internals and Design, © 2001