Computer System 1 Processor Control Unit ALU Decode

Computer System 1

Processor基本運作方式 開始執行運算 Control Unit ALU 抓取指令 & Decode register … register 寫回資料 memory 存取資料 2

Processor基本運作方式 (cont’d) l Instruction fetch l Decode l Execution l Write Back 3

好像少了什麼? 開始執行運算 Control Unit ALU 抓取指令 & Decode register … register 寫回資料 memory 存取資料 4

系統匯流排 (System Bus) l The internal bus connects the different components inside the case: The CPU, system memory, and all other components on the motherboard. 匯流排寬度越大 CPU 一次可以傳輸更 多的資料 CPU 能參考到更大的 記憶體位址 = 電腦的運算能力越強 = 電腦速度變快 = 有更多的記憶體 6

擴充匯流排 (External Bus) The external bus connects the different external devices, peripherals, expansion slots, I/O ports and drive connections to the rest of the computer. l 簡單的說，就是允許各種不同的device與你的電 腦連接 l 7

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1. 2. 3. 4. 5. 6. 7. ISA (Industry Standard Architecture) bus slots for plugging in older 8 and 16 -bit adapter cards. PCI (Peripheral Component Interconnect) bus slots for plugging in newer 32 -bit adapter cards. Hard drive controller connectors. Power connector. Parallel port connector. Floppy disk controller connector. SIMM (Single In-line Memory Module) sockets for adding memory. 13

8. 9. 10. 11. 12. Lithium backup battery for the CMOS. Configuration jumper block for changing the ISA bus clock, clearing a CMOS password, resetting the CMOS to the default settings, etc. Front panel connectors for the internal speaker, keyboard and hard drive lights, +12 v fan, etc. Pentium processor in a Socket 5 connector. 256 K cache (those systems with an external cache only). 14

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ISA 指令集架構 l ISA (Instruction Set Architecture) ¡ The parts of a processor's design that need to be understood in order to write assembly language, such as the machine language instructions and registers. 18

RISC vs. CISC l Complex Instruction Set Computer 複雜指令集計算模式 ¡ 提供使用者豐富的指令集，使用方便，但是速度較慢 ¡ 其中許多指令很少用到 ¡ Fewer instructions per task ¡ l Reduced Instruction Set Computer Small, heavily optimized instruction set executable in single short cycle ¡ 精簡指令集計算模式 ¡ 只提供一組(必須的)指令 ¡ 速度增快 ¡ 19

EPIC (Hot and New) Explicitly Parallel Instruction Computing l 增加許多指令平行執行的設計 l 開發指令平行執行的能力 l Intel Itanium (IA 64) l 20

微處理器 (Microprocessor) l Moore’s Law ¡ Gordon Moore, 1965 ¡ The number of transistors on a chip doubles every 18 to 24 months 23

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Microprocessor l Intel ¡ x 86, Pentium, Itanium… l AMD ¡ Athlon XP, Opteron… l DEC Alpha (death? ) l IBM Power. PC l SUN Sparc l Motorola 68 k 25

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DSP (Digital Signal Processing) 數位訊號處理 l Changing or analysing information which is measured as discrete sequences of numbers l Features l they use a lot of maths (multiplying and adding signals) ¡ they deal with signals that come from the real world ¡ they require a response in a certain time ¡ 28

DSP Processor TI C 6 x l ADI ¡ Blackfin ¡ ADSP l Philips l Hitachi SH-3 l 29

Network Processor ASIC( Application Specific Integrated Circuit ) ¡ hardwired solution l ASIP( Application Specific Instruction Processor ) ¡ Instruction set processor specialized for a particular application domain l Definition of Network Processor ¡ ASIP for networking application domain ¡ Software programmable device with architectural features and special circuitry for packet processing l 30

So. C (System On Chip) l System ¡ A collection of all kinds of components and/or sybsystems that are appropriately interconnected to perform the specified functions for end users. (Printed Circuit Board) PCB 31

IC製作流程 IC design l 晶圓加 (wafer fabrication) l 封裝(packaging) l 測試(test) l 32

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