Computer Organization CS 224 Fall 2012 Lesson 12

Computer Organization CS 224 Fall 2012 Lesson 12

q Two processors or threads sharing an area of memory l l P 1 writes, then P 2 reads Data race if P 1 and P 2 don’t synchronize - Result depends of order of accesses !! q Software synchronization routines needed l l q Lock and unlock, etc. To implement mutual exclusion to shared memory Hardware support required l Atomic read-and-modify memory operation l No other access to the location allowed between the read and write l Used for e. g. atomic swap of register ↔ memory l Could be a single instruction (as in some processors) l Or an atomic pair of instructions (as in MIPS and others) § 2. 11 Parallelism and Instructions: Synchronization

Atomic Exchange Support q Atomic exchange (atomic swap) – interchanges a value in a register for a value in memory atomically, i. e. , as one operation (instruction) l Implementing an atomic exchange would require both a memory read and a memory write in a single, uninterruptable instruction. An alternative is to have a pair of specially configured instructions ll $t 1, 0($s 1) sc $t 0, 0($s 1) conditional #load linked #store

Atomic Exchange with ll and sc q If the contents of the memory location specified by the ll are changed before the sc to the same address occurs, the sc fails (returns a zero) try: add $t 0, $zero, $s 4 ll $t 1, 0($s 1) sc $t 0, 0($s 1) beq $t 0, $zero, try add $s 4, $zero, $t 1 q #$t 0=$s 4 (exchange value) #load memory value to $t 1 #try to store exchange #value to memory, if fail #$t 0 will be 0 #try again on failure #load value in $s 4 If the value in memory between the ll and the sc instructions changes, then sc returns a 0 in $t 0 causing the code sequence to try again.

C program compiler assembly code assembler object code library routines linker machine code executable loader memory § 2. 12 Translating and Starting a Program The C Code Translation Hierarchy

Assembler Pseudoinstructions q Most assembler instructions represent machine instructions one-to-one q Pseudoinstructions: figments of the assembler’s imagination move $t 0, $t 1 → add $t 0, $zero, $t 1 blt $t 0, $t 1, L → slt $at, $t 0, $t 1 bne $at, $zero, L l $at (register 1): assembler temporary

Producing an Object Code Module q Assembler (or compiler) translates program into machine instructions, makes an object module q Provides information for building a complete program from the pieces l Header: described contents of object module l Text segment: translated instructions l Static data segment: data allocated for the life of the program l Relocation info: for contents that depend on absolute location of loaded program l Symbol table: global definitions and external refs l Debug info: for associating with source code

Linking Object Modules q Produces an executable image (. exe file) 1. Merges segments 2. Resolve labels (determine their addresses) 3. Patch location-dependent and external refs q Could leave location dependencies for fixing later with a relocating loader l But with virtual memory, no need to do this l Program can be loaded into absolute location in virtual memory space

Loading a Program q Load from image file on disk into memory 1. Read header to determine segment sizes for text and data 2. Create virtual address space (large enough for text and data) 3. Copy text and initialized data into memory 4. Copy parameters for main program (if any) onto stack 5. Initialize registers (including $sp, $fp, $gp) 6. Jump to startup routine - Copies arguments to $a 0, … and calls main - When main returns, do exit syscall

Dynamic Linking q Only link/load library procedure when it is called l l l Requires procedure code to be relocatable Avoids image bloat caused by static linking of all (transitively) referenced libraries Automatically picks up new library versions

Lazy Linkage Indirection table Stub: loads routine ID, jumps to linker/loader Linker/loader code Dynamically mapped code

Starting Java Applications Simple portable instruction set for the JVM Compiles bytecodes of “hot” methods into native code for host machine Interprets bytecodes