Computer Architecture and the FetchExecute Cycle Memory Addressing

Computer Architecture and the Fetch-Execute Cycle Memory Addressing Techniques VCN – ICT Department 2013 A 2 Computing 1

Learning Objectives Explain the concepts of direct, indexed and relative addressing of memory when referring to low-level languages. VCN – ICT Department 2013 A 2 Computing 2

Memory Addressing Techniques 1. Direct Addressing 2. Indirect Addressing 3. Indexed Addressing 4. Relative Addressing 5. Immediate Addressing VCN – ICT Department 2013 A 2 Computing 3

1. Direct Addressing Means that the value in the address part of a machine code instruction is the address of the data. Simple to use but does not allow access to all memory addresses as there are memory addresses larger than can be held in the address part of an instruction. n e. g. A 32 -bit memory location may use 12 bits for the instruction code and 20 bits for the address of the data. This would allow for 2^12 (= 4096) instruction codes and 2^20 (= 1 048 576) memory addresses. However, a computer using 32 -bit memory locations will have 2^32 (= 4 294 967 296) memory addresses. So direct addressing does not allow reference to all addresses e. g. for a computer using 32 -bit memory locations, addresses from 2^20 – 2^32 cannot be referred to. VCN – ICT Department 2013 A 2 Computing 4

2. Indirect Addressing Means that the value in the address part of a machine code instruction is the address of the data. VCN – ICT Department 2013 A 2 Computing 5

Why use indirect addressing? Allows more memory to be accessed than direct addressing as the full size of register is used for an address. n If this value points to a location which holds nothing but an address then 2^32 locations in memory can be addressed. VCN – ICT Department 2013 A 2 Computing 6

3. Indexed Addressing Index Register (IR) n A special register used to adjust the address part of an instruction. The address given as part of the instruction is added to the contents of the index register (IR) to give the address of the data. Index register is then incremented. VCN – ICT Department 2013 A 2 Computing 7

Why use indexed addressing? Allows a set of contiguous data locations (e. g. an array) to be accessed without altering the instruction. n i. e. Address in instruction does not change, only contents of IR. VCN – ICT Department 2013 A 2 Computing 8

Indexed Addressing Instr. ADD 100 IR: 0 VCN – ICT Department 2013 Address 100 101 102 103 104 105 A 2 Computing Data: …. . 9

Indexed Addressing Instr. ADD 100 IR: 1 VCN – ICT Department 2013 Address 100 101 102 103 104 105 A 2 Computing Data: …. . 10

Indexed Addressing Instr. ADD 100 IR: 2 VCN – ICT Department 2013 Address 100 101 102 103 104 105 A 2 Computing Data: …. . 11

Indexed Addressing Instr. ADD 100 IR: 3 VCN – ICT Department 2013 Address 100 101 102 103 104 105 A 2 Computing Data: …. . 12

Indexed Addressing Instr. ADD 100 IR: 4 VCN – ICT Department 2013 Address 100 101 102 103 104 105 A 2 Computing Data: …. . 13

Indexed Addressing Instr. ADD 100 IR: 5 VCN – ICT Department 2013 Address 100 101 102 103 104 105 A 2 Computing Data: …. . 14

Note The IR does not necessarily have to start at 0. Why? n To reach a particular field in a record with several fields. IR = Address of the start of the record. Instruction address = Offset of the required field from the start of the record. n To reach an instruction in a program no matter where the program/page/segment is in main memory (see Memory Management Presentation or next 2 slides). IR = Address of the start of the program/page/segment (set by the loader). Instruction address = Offset of the required instruction from the start of the program/page/segment. VCN – ICT Department 2013 A 2 Computing 15

4. Relative Addressing Used only with jump instructions. n Address in the jump instruction is the displacement from the last address already in the PC from the previous instruction. The address in the instruction is added to the value in the PC. e. g. n The current instruction is in address 3000 and is Jump *45*, using relative addressing this means that the line wants to jump to an instruction 45 lines ahead of the next instruction (due to the PC being automatically incremented by 1 during any Fetch-Decode-Execute. Reset Cycle this 46 lines ahead of the current instruction). n n The PC will have been incremented to 3001 (ready for the next instruction) so the PC is changed to 3001+45 = 3046. The next cycle retrieves the next instruction from there. The program knows where the line is relative to the current instruction but not the true address. VCN – ICT Department 2013 A 2 Computing 16

Index Table Physical Page Logical Page Number 8 5 Base Address 3000 Displacement e. g. 45 + Physical Address e. g. 3001+45 = 3046 VCN – ICT Department 2013 A 2 Computing 17

For more research http: //www. edsim 51. com/8051 Notes/80 51/instruction. Set. Summary. html http: //en. wikipedia. org/wiki/Addressing_ modes Physical Address e. g. 3501+131=3632 Displacement + e. g. 131 Segment Index Table Base Address Segment Size Segment 3500 1500 3 VCN – ICT Department 2013 A 2 Computing 18

5. Immediate Addressing Immediate addressing is so-named because the value to be stored in memory immediately follows the operation code in memory. n n The instruction itself dictates what value will be stored in memory. For example, the instruction: MOV A, #20 h n I have used this in the form “Load 20” where 20 refers to a value and it is assumed that the 10 will go directly into the accumulator. This instruction uses Immediate Addressing because the Accumulator will be loaded with the value that immediately follows; in this case 20 (hexadecimal). Immediate addressing is very fast since the value to be loaded is included in the instruction. However, since the value to be loaded is fixed at compile -time it is not very flexible. VCN – ICT Department 2013 A 2 Computing 19

Immediate Addressing Advantage: n No memory reference other than instruction fetch is required to obtain operand. Disadvantage: n The size of the number is limited to the size of the address field, which most instruction sets is small compared to word length. n This is the similar to the problem “direct addressing” has. For more research http: //www. 8052. com/tutaddr. phtml VCN – ICT Department 2013 A 2 Computing 20

Question State the 4 methods of memory addressing and explain why they are used. VCN – ICT Department 2013 A 2 Computing 21