Computer Aided Design Course 2 1 2 Spice

Common File Extensions. OPJ Capture project file . MNL Layout netlist file . DSN

Schematics Editing steps n n n n n Start a new project, select “Analog

Automatic Reference Designator Assignment 9

Bias Point Display Enable bias voltage display Enable power display Enable bias currents display

BASIC PART ABBREVIATIONS Resistor R capacitor C current-controlled current source F current-controlled voltage source

Analog stimuli The analog stimuli symbols available in Schematics are: 17

*. VSTIM and ISTIM symbols require the Stimulus Editor to define the input signal.

Stimulus Symbols for Analog Time-Based Input Signals 20

Defining Stimulus Symbol Attributes Manually in Schematics To use any of these source types,

As an alternative, the Stimulus Editor utility automates the process of defining the transient

HOW DOES SPICE WORK? Basically, SPICE operates like this: 1. Describe a circuit in

Netlist File * source CIRC 1 V_V 1 N 00129 0 +SIN 0 1

NETLIST OR SCHEMATIC PAGE? Although, the schematic capture has its advantages, each SPICE vendor

NETLIST OR SCHEMATIC PAGE? The netlist description of a circuit is simple and fairly

Output File **** 03/05/06 16: 06: 27 ******* PSpice 10. 3. 0 (Jan 2004)

Output File - 2 *Analysis directives: . TRAN 0 10 ms 0. PROBE V(alias(*))

Output File - 3 **** 03/05/06 16: 06: 27 ******* PSpice 10. 3. 0

Output File - 4 JOB CONCLUDED **** 03/05/06 16: 06: 27 ******* PSpice 10.

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Computer Aided Design Course 2 1

Spice Simulation 3

Common File Extensions. OPJ Capture project file . MNL Layout netlist file . DSN Capture design file . SWP Layout backannotation file . OLB Capture part library file . XRF Cross-reference report . UPD Property update file . NET or. ASC Other netlist files . DRC Design rules check file . VHD or. VHO VHDL source file . BOM Bill of Materials file . EDF EDIF 2. 0 netlist . EXP Export properties file 5

Project Manager Window 6

Schematics Editing steps n n n n n Start a new project, select “Analog or Mixed A/D” (enables PSpice) Create a new directory to hold the files and provide a descriptive file name Create the project Add the PSpice library (ex. “analog. olb”) Build and wire the circuit Annotate Run Design Rules Check (DRC) Build Bill of Materials (BOM) Print 8

Automatic Reference Designator Assignment 9

Design Rules Check 10

Create BOM to List Footprints 11

PSpice Analysis Flow 12

New Simulation Profile 13

Simulation Settings Menu 14

Bias Point Display Enable bias voltage display Enable power display Enable bias currents display 15

BASIC PART ABBREVIATIONS Resistor R capacitor C current-controlled current source F current-controlled voltage source H ground, analog AGND voltage-controlled current source G voltage-controlled voltage source E Simple voltage source VAC Transient sine voltage source VSIN 16

Analog stimuli The analog stimuli symbols available in Schematics are: 17

*. VSTIM and ISTIM symbols require the Stimulus Editor to define the input signal. **. FILE-BASED Symbols: VPWL_F_RE_FOREVER and VPWL_F_N_TIMES are file-based symbols; the stimulus specification resides in a file and adheres to PSpice netlist syntax. To determine the symbol name for an equivalent Current source -In the table of voltage source symbols, replace the first V in the symbol name with I (Example: VDC -> IDC). 19

Stimulus Symbols for Analog Time-Based Input Signals 20

Defining Stimulus Symbol Attributes Manually in Schematics To use any of these source types, you must place the symbol in your schematic and then define its transient behavior. Each attribute-characterized stimulus has a distinct set of attributes depending upon the kind of transient behavior it represents. For VPWL_F_xxx and IPWL_F_xxx, a separate file contains the stimulus specification. Defining VSTIM or ISTIM using the Stimulus Editor 27

As an alternative, the Stimulus Editor utility automates the process of defining the transient behavior of stimulus devices. The Stimulus Editor allows you to create analog stimuli which generate sine wave, repeating pulse, exponential pulse, single-frequency FM, and piecewise linear waveforms. It also facilitates creating digital stimuli with complex timing relations. This applies to both stimulus symbols placed in your schematic as well as new ones that you might create. 28

Stimulus Editor 29

HOW DOES SPICE WORK? Basically, SPICE operates like this: 1. Describe a circuit in a text file (“. cir” extension) called a netlist OR draw the circuit using graphical symbols on a schematic page. 2. Run a simulation. SPICE reads the netlist and then performs the requested analysis: AC, DC, or TRANSIENT RESPONSE. The results are stored in a text output file (“. out” extension) or a binary data file. 3. View the results of the simulation in a text output file ( “. out” ) using a text editor. Most SPICE programs provide a graphical viewer to plot the waveforms stored in the binary data file (Probe window). 30

Netlist File * source CIRC 1 V_V 1 N 00129 0 +SIN 0 1 1 k 0 0 0 R_R 1 1 k N 00129 N 00138 L_L 1 10 u. H N 00138 N 00145 C_C 1 0 N 00145 1 n 31

NETLIST OR SCHEMATIC PAGE? Although, the schematic capture has its advantages, each SPICE vendor has a different drawing interface and file format. This would cause great confusion if you used a version of SPICE different from the one used at this site. Also, the learning curve for the schematic capture can be steep. Many component characteristics are not visible from the schematic. (Ultimately, the schematic capture program creates a netlist before running a simulation. ) 32

NETLIST OR SCHEMATIC PAGE? The netlist description of a circuit is simple and fairly consistent for each SPICE vendor with some variations. The entire circuit and component properties are visible. Learning the netlist is easy and making changes is fast. You can create a netlist by drawing the circuit on paper and applying a few simple rules. (Several books written on SPICE strongly recommend learning the netlist, even if you decide later to use a 33 schematic capture program. )

NETLIST 34

NETLIST 35

Output File **** 03/05/06 16: 06: 27 ******* PSpice 10. 3. 0 (Jan 2004) ******* ID# 11111 ** Profile: "SCHEMATIC 1 -circ 1" [ C: ORCAD_DATACADcirc 1 -PSpice. FilesSCHEMATIC 1circ 1. sim ] **** CIRCUIT DESCRIPTION *************************************** ** Creating circuit file "circ 1. cir" ** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS *Libraries: * Profile Libraries : * Local Libraries : * From [PSPICE NETLIST] section of C: Or. CAD_10. 3toolsPSpice. ini file: . lib "nom. lib" 36

Output File - 2 *Analysis directives: . TRAN 0 10 ms 0. PROBE V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)). INC ". . SCHEMATIC 1. net" **** INCLUDING SCHEMATIC 1. net **** * source CIRC 1 V_V 1 N 00129 0 +SIN 0 1 1 k 0 0 0 R_R 1 N 00129 N 00138 1 k L_L 1 N 00138 N 00145 10 u. H C_C 1 0 N 00145 1 n **** RESUMING circ 1. cir ****. END 37

Output File - 3 **** 03/05/06 16: 06: 27 ******* PSpice 10. 3. 0 (Jan 2004) ******* ID# 11111 ** Profile: "SCHEMATIC 1 -circ 1" [ C: ORCAD_DATACADcirc 1 -PSpice. FilesSCHEMATIC 1circ 1. sim ] **** INITIAL TRANSIENT SOLUTION TEMPERATURE = 27. 000 DEG C *************************************** NODE VOLTAGE (N 00129) NODE VOLTAGE 0. 0000 (N 00138) NODE VOLTAGE 0. 0000 (N 00145) NODE VOLTAGE 0. 0000 VOLTAGE SOURCE CURRENTS NAME CURRENT V_V 1 0. 000 E+00 TOTAL POWER DISSIPATION 0. 00 E+00 WATTS 38

Output File - 4 JOB CONCLUDED **** 03/05/06 16: 06: 27 ******* PSpice 10. 3. 0 (Jan 2004) ******* ID# 11111 ** Profile: "SCHEMATIC 1 -circ 1" [ C: ORCAD_DATACADcirc 1 -PSpice. FilesSCHEMATIC 1circ 1. sim ] **** JOB STATISTICS SUMMARY *************************************** Total job time (using Solver 1) = . 19 39

Probe window 40

Probe window 41

Probe window 42

Probe window 43