CMPUT 229 Fall 2003 Topic A Flow Analysis


































- Slides: 34
CMPUT 229 - Fall 2003 Topic. A: Flow Analysis José Nelson Amaral CMPUT 229 - Computer Organization and Architecture I 1
Reading Material The concepts necessary for flow analysis, such as basic blocks, control flow graphs, and data dependence graphs are presented in several compiler textbooks (most of these books are available in the Uof. A library). For instance: Randy Allen, Kennedy, Optimizing Compilers for Modern Architectures: A Dependence-based Approach, Morgan Kauffman, 2001. Andrew W. Appel : Modern Compiler Implementation in C A. Aho, R. Sethi and J. Ullman, Compilers: Principles, Techniques and Tools (The Dragon Book), Addison Wesley, 1988 M. Wolfe, High Performance Compilers of Parallel Computing, Addison Wesley, 1995 S. Muchnick, Advanced Compiler Design and Implementation, Morgan Kaufman, 1997 Section 6. 4 (pp. 476) of Patterson-Hennessy has a brief discussion of data dependences. CMPUT 229 - Computer Organization and Architecture I 2
Analysing Code Given the code for Panic in the previous slide. What is the best way to analyse it? Compilers use the notion of a basic block. A basic block is a sequence of instructions with the following property: Whenever one instruction of the basic block is executed, all the instructions in the basic block must be executed. I. e. , only the first instruction of a basic block can be the target of a jump or branch, and only the last instruction in a basic block can be a jump or a branch. CMPUT 229 - Computer Organization and Architecture I 3
Finding Basic Blocks The first instruction of a basic block is the leader of the basic block. Given a sequence of assembly code, compilers can find the leaders of basic blocks using a very simple set of rules: (i) The first instruction in the program is a leader. (ii) Any statement that is the target of a branch statement is a leader (in general these instructions have an associated label). (iii) Any instruction that immediately follows a branch or return instruction is a leader. CMPUT 229 - Computer Organization and Architecture I 4
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 5
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 6
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 7
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 8
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 9
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 10
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 11
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 12
Identify the leaders Exception Handler: Display. Data Display. Status. kdata Pmess: . asciiz “Panic: . ktext Panic: PRead 1: la lb beq PWait 1: lw bge sw addi j PRead 2: lb beq PWait 2: lw bge sw addi j Pcontinue: li sw li syscall = 0 xbfff 0008 = 0 xbfff 000 c “ # Panic prints a message and quits $a 1, Pmess $a 2, ($a 1) # read letter to print $a 2, $zero, PRead 2 # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 1 # keep reading until it is ready $a 2, Display. Data # output character $a 1, 1 # advance character PRead 1 $a 2, ($a 0) # Print message pointed by $a 0 $a 2, $zero, Pcontinue # done when we find a null $a 3, Display. Status # Read the status of the display $a 3, $zero, PWait 2 # keep reading until it is ready $a 2, Display. Data # output character $a 0, 1 # advance character PRead 2 $v 0, 0 # clear re-entrance flag $v 0, 13 # the quit_now syscall CMPUT 229 - Computer Organization and Architecture I 13
Basic Block Formation Rule Once we know the leaders, the basic block formation follows a simple rule: A basic block is formed by a leader and all the instructions that come after the leader up to but not including the next leader. CMPUT 229 - Computer Organization and Architecture I 14
B 1 Panic: la $a 1, Pmess B 2 PRead 1: lb beq $a 2, ($a 1) $a 2, $zero, PRead 2 B 3 PWait 1: lw bge $a 3, Display. Status $a 3, $zero, PWait 1 B 4 sw addi j $a 2, Display. Data $a 1, 1 PRead 1 B 5 PRead 2: lb beq $a 2, ($a 0) $a 2, $zero, Pcontinue lw bge $a 3, Display. Status $a 3, $zero, PWait 2 sw addi j $a 2, Display. Data $a 0, 1 PRead 2 B 6 PWait 2: B 7 B 8 Pcontinue: li sw li syscall $v 0, 0 $v 0, flag $v 0, 13 Now that we have the basic blocks, we can connect them using two simple rules: (1) connect Bi to Bj if there is a branch or jump from the last instruction of Bi to the first instruction of Bj. (2) connect Bi to Bj if both: (i) Bj immediately follows Bi, and (ii) Bi does not end with an unconditional jump CMPUT 229 - Computer Organization and Architecture I 15
B 1 Panic: la $a 1, Pmess B 2 PRead 1: lb beq $a 2, ($a 1) $a 2, $zero, PRead 2 B 3 PWait 1: lw bge $a 3, Display. Status $a 3, $zero, PWait 1 B 4 sw addi j $a 2, Display. Data $a 1, 1 PRead 1 B 5 PRead 2: lb beq $a 2, ($a 0) $a 2, $zero, Pcontinue B 6 PWait 2: lw bge $a 3, Display. Status $a 3, $zero, Wait 2 B 7 sw addi j $a 2, Display. Data $a 0, 1 PRead 2 B 8 Pcontinue: li sw li syscall $v 0, 0 $v 0, flag $v 0, 13 B 1 B 2 B 3 B 5 B 4 B 8 The graph that connects the basic blocks in this way is called the Control Flow Graph for the program. CMPUT 229 - Computer Organization and Architecture I 16
Apply the basic block formation algorithm that you just learned to the matrix multiplication code from Topic 7. MIPS assembly: li $t 1, 32 li $s 0, 0 L 1: li $s 1, 0 L 2: mtc 1 $zero, $f 4 mtc 1 $zero, $f 5 li $s 2, 0 L 3: sll $t 2, $s 0, 5 addu $t 2, $s 2 sll $t 2, 3 addu $t 2, $a 1, $t 2 l. d $f 16, 0($t 2) sll $t 2, $s 2, 5 addu $t 2, $s 1 sll $t 2, 3 addu $t 2, $a 2, $t 2 l. d $f 18, 0($t 2) mul. d $f 16, $f 18, $f 16 add. d $f 4, $f 16 addiu $s 2, 1 bne $s 2, $t 1, L 3 sll $t 2, $s 0, 5 addu $t 2, $s 1 sll $t 2, 3 addu $t 2, $a 0, $t 2 swc 1 $f 4, 0($t 2) swc 1 $f 5, 4($t 2) addiu $s 1, 1 bne $s 1, $t 1, L 2 CMPUT 229 - Computer addiu $s 0, 1 Organizationbne and Architecture I L 1 $s 0, $t 1, • • • # t 1 32 #i 0 #j 0 #k 0 # $t 2 32 i + k # $t 2 (32 i + k) 8 # $t 2 Addr(y[i][k]) # $f 16 y[i][k] # $t 2 32 k # $t 2 32 i + j # $t 2 (32 k + j) 8 # $t 2 Addr(z[k][j]) # $f 16 z[k][j] # $f 16 y[i][k] z[k][j] # k k+1 # $t 2 32 i + j # $t 2 (32 i + j) 8 # $t 2 Addr(x[i][j]) # x[i][j] $f 4 # j j+1 # i i+1 17
B 0 B 1 B 2 B 3 Apply the basic block formation algorithm that you just learned to the matrix multiplication code from Topic 7. B 4 B 5 MIPS assembly: li $t 1, 32 li $s 0, 0 L 1: li $s 1, 0 L 2: mtc 1 $zero, $f 4 mtc 1 $zero, $f 5 li $s 2, 0 L 3: sll $t 2, $s 0, 5 addu $t 2, $s 2 sll $t 2, 3 addu $t 2, $a 1, $t 2 l. d $f 16, 0($t 2) sll $t 2, $s 2, 5 addu $t 2, $s 1 sll $t 2, 3 addu $t 2, $a 2, $t 2 l. d $f 18, 0($t 2) mul. d $f 16, $f 18, $f 16 add. d $f 4, $f 16 addiu $s 2, 1 bne $s 2, $t 1, L 3 sll $t 2, $s 0, 5 addu $t 2, $s 1 sll $t 2, 3 addu $t 2, $a 0, $t 2 swc 1 $f 4, 0($t 2) swc 1 $f 5, 4($t 2) addiu $s 1, 1 bne $s 1, $t 1, L 2 CMPUT 229 - Computer addiu $s 0, 1 Organizationbne and Architecture I L 1 $s 0, $t 1, • • • # t 1 32 #i 0 #j 0 #k 0 # $t 2 32 i + k # $t 2 (32 i + k) 8 # $t 2 Addr(y[i][k]) # $f 16 y[i][k] # $t 2 32 k # $t 2 32 i + j # $t 2 (32 k + j) 8 # $t 2 Addr(z[k][j]) # $f 16 z[k][j] # $f 16 y[i][k] z[k][j] # k k+1 # $t 2 32 i + j # $t 2 (32 i + j) 8 # $t 2 Addr(x[i][j]) # x[i][j] $f 4 # j j+1 # i i+1 18
B 0 Build a Control Flow Graph for this code. B 1 B 2 B 3 B 0 B 1 B 2 B 3 B 4 B 5 MIPS assembly: li $t 1, 32 li $s 0, 0 L 1: li $s 1, 0 L 2: mtc 1 $zero, $f 4 mtc 1 $zero, $f 5 li $s 2, 0 L 3: sll $t 2, $s 0, 5 addu $t 2, $s 2 sll $t 2, 3 addu $t 2, $a 1, $t 2 l. d $f 16, 0($t 2) sll $t 2, $s 2, 5 addu $t 2, $s 1 sll $t 2, 3 addu $t 2, $a 2, $t 2 l. d $f 18, 0($t 2) mul. d $f 16, $f 18, $f 16 add. d $f 4, $f 16 addiu $s 2, 1 bne $s 2, $t 1, L 3 sll $t 2, $s 0, 5 addu $t 2, $s 1 sll $t 2, 3 addu $t 2, $a 0, $t 2 swc 1 $f 4, 0($t 2) swc 1 $f 5, 4($t 2) addiu $s 1, 1 bne $s 1, $t 1, L 2 CMPUT 229 - Computer addiu $s 0, 1 Organizationbne and Architecture I L 1 $s 0, $t 1, • • • # t 1 32 #i 0 #j 0 #k 0 # $t 2 32 i + k # $t 2 (32 i + k) 8 # $t 2 Addr(y[i][k]) # $f 16 y[i][k] # $t 2 32 k # $t 2 32 i + j # $t 2 (32 k + j) 8 # $t 2 Addr(z[k][j]) # $f 16 z[k][j] # $f 16 y[i][k] z[k][j] # k k+1 # $t 2 32 i + j # $t 2 (32 i + j) 8 # $t 2 Addr(x[i][j]) # x[i][j] $f 4 # j j+1 # i i+1 19
Superscalar Pipelined Machines COPYRIGHT 1998 MORGAN KAUFMANN PUBLISHERS, INC. ALL RIGHTS RESERVED CMPUT 229 - Computer Organization and Architecture I 20
Data Dependencies We say that there is a data dependence between two instructions if is is not possible to invert the order of execution of the two instructions without producing wrong results. When the first instruction computes a value that the second instruction uses, we say that there is a flow dependence from the first to the second instruction. l. d mul. d $f 18, 0($t 2) $f 16, $f 18, $f 16 # $f 16 z[k][j] # $f 16 y[i][k] z[k][j] For instance, in the sequence of instructions above, the value of $f 18 is computed by the load and used by the multiply instruction. Therefore there is a flow dependence from the load to the store. CMPUT 229 - Computer Organization and Architecture I 21
Data Flow Graphs Compilers often have to take into consideration the dependences between instructions. In its data flow analysis, compilers typically build a data flow graph also called a data dependence graph for each basic block of the program. A data flow graph is a directed graph with one node for each instruction in the basic block. An edge (vi, vj) in the data flow graph indicates that there is a flow dependence from vi to vj. CMPUT 229 - Computer Organization and Architecture I 22
B 0 Build a Data Dependence Graph for Basic Block B 3 B 1 B 2 B 3 B 4 B 5 MIPS assembly: a li $t 1, 32 b li $s 0, 0 L 1: c li $s 1, 0 L 2: d mtc 1 $zero, $f 4 e mtc 1 $zero, $f 5 f li $s 2, 0 L 3: g sll $t 2, $s 0, 5 h addu $t 2, $s 2 i sll $t 2, 3 j addu $t 2, $a 1, $t 2 k l. d $f 16, 0($t 2) l sll $t 2, $s 2, 5 m addu $t 2, $s 1 n sll $t 2, 3 o addu $t 2, $a 2, $t 2 p l. d $f 18, 0($t 2) q mul. d $f 16, $f 18, $f 16 r add. d $f 4, $f 16 s addiu $s 2, 1 t bne $s 2, $t 1, L 3 u sll $t 2, $s 0, 5 v addu $t 2, $s 1 w sll $t 2, 3 x addu $t 2, $a 0, $t 2 y swc 1 $f 4, 0($t 2) z swc 1 $f 5, 4($t 2) a 1 addiu $s 1, 1 bne $s 1, $t 1, L 2 CMPUT - Computer c 1 229 addiu $s 0, 1 Organization and Architecture I L 1 c 2 bne $s 0, $t 1, • • • # t 1 32 #i 0 #j 0 #k 0 # $t 2 32 i + k # $t 2 (32 i + k) 8 # $t 2 Addr(y[i][k]) # $f 16 y[i][k] # $t 2 32 k # $t 2 32 i + j # $t 2 (32 k + j) 8 # $t 2 Addr(z[k][j]) # $f 16 z[k][j] # $f 16 y[i][k] z[k][j] # k k+1 # $t 2 32 i + j # $t 2 (32 i + j) 8 # $t 2 Addr(x[i][j]) # x[i][j] $f 4 # j j+1 # i i+1 23
Build a Data Dependence Graph for Basic Block B 3 t 1 s 0 s 2 a 1 g s s 1 l h m i n j o k p q t s 2 MIPS assembly: a li $t 1, 32 # t 1 3 B 0 b li $s 0, 0 #i 0 li $s 1, 0 #j 0 B 1 L 1: c mtc 1 $zero, $f 4 B 2 L 2: d e mtc 1 $zero, $f 5 f li $s 2, 0 #k 0 sll $t 2, $s 0, 5 # $t 2 B 3 L 3: g h addu $t 2, $s 2 # $t 2 a 2 f 4 i sll $t 2, 3 # $t 2 j addu $t 2, $a 1, $t 2 # $t 2 k l. d $f 16, 0($t 2) # $f 16 l sll $t 2, $s 2, 5 # $t 2 m addu $t 2, $s 1 # $t 2 n sll $t 2, 3 # $t 2 o addu $t 2, $a 2, $t 2 # $t 2 p l. d $f 18, 0($t 2) # $f 16 q mul. d $f 16, $f 18, $f 16 # $f 16 r add. d $f 4, $f 16 s addiu $s 2, 1 #k k t bne $s 2, $t 1, L 3 u sll $t 2, $s 0, 5 # $t 2 B 4 v addu $t 2, the $t 2, left, $s 1 it seems # $t 2 Analysing the DDG on that w sll $t 2, 3 # $t 2 instructions g-h-i-j-k could be executed x addu $t 2, $a 0, $t 2 # $t 2 at the same time as l-m-n-o-p. y swc 1 $f 4, 0($t 2) # x[i][j] z swc 1 $f 5, 4($t 2) r But in the assembly code a 1 addiu $s 1, 1 above, # j j+ b 1 bne L 2 it seems that there$s 1, is a$t 1, conflict with the CMPUT 229 B 5 - Computer c 1 addiu $s 0, 1 use of register $t 2. How compilers# i i+ f 4 Organization and Architecture 24 c 2 I bne $s 0, $t 1, L 1 deal • • • with a situation like this?
Using pseudo-registers. t 1 s 0 s 2 g s s 1 a 1 l h m i n j o k p q t s 2 MIPS assembly: a li $t 1, 32 # t 1 3 B 0 b li $s 0, 0 #i 0 li $s 1, 0 #j 0 B 1 L 1: c mtc 1 $zero, $f 4 B 2 L 2: d e mtc 1 $zero, $f 5 f li $s 2, 0 #k 0 sll $p 2, $s 0, 5 B 3 L 3: g h addu $p 3, $p 2, $s 2 a 2 f 4 i sll $p 4, $p 3, 3 j addu $p 5, $a 1, $p 4 k l. d $f 16, 0($p 5) l sll $p 6, $s 2, 5 m addu $p 7, $p 6, $s 1 n sll $p 8, $p 7, 3 o addu $p 9, $a 2, $p 8 p l. d $f 18, 0($p 9) q mul. d $pf 17, $f 18, $f 16 r add. d $f 4, $pf 17 s addiu $p 10, $s 2, 1 t bne $p 10, $t 1, L 3 u sll $t 2, $s 0, 5 # $t 2 B 4 v addu $t 2, $s 1 # $t 2 Compilers rename the registers, generating w sll $t 2, 3 # $t 2 ax code with pseudo-registers. addu $t 2, $a 0, $t 2 # $t 2 $f 4, 0($t 2) they assume # x[i][j] For they firstswc 1 code generation, z swc 1 $f 5, 4($t 2) that there is an ilimited number of # j j+ r a 1 addiu $s 1, 1 pseudo-registers. b 1 bne $s 1, $t 1, L 2 CMPUT 229 B 5 - Computer c 1 addiu $s 0, 1 # i i+ f 4 Organization and Architecture 25 c 2 I bne $s 0, $t 1, L 1 • • •
Value of Flow Analysis Although flow analysis was developed for code analysis during compilation, it is of great value while coding and debugging programs. Often, the analysis of the control flow and data flow in a program will elicit subtle bugs that might be otherwise difficult to uncover. Control flow analysis is specially helpful for the analysis of assembly code in which the control structure of the code is not as evident as in higher level languages. CMPUT 229 - Computer Organization and Architecture I 26
Domination Relation Definition: Let G = (N, E, s, f) denote a flowgraph, where: N: set of vertices E: set of edges s: starting node. f: sink node and let a N, b N. 1. a dominates b, if every path from s to b contains a. 2. b post-dominates a, if every path from a to f contains b. CMPUT 229 - Computer Organization and Architecture I 27
An Example Domination relation: { (1, 1), (1, 2), (1, 3), (1, 4) … (2, 3), (2, 4), … (2, 10) } 1 S 2 3 4 5 6 Dominator Sets: DOM(1) = {1} DOM(2) = {1, 2} DOM(3) = {1, 2, 3} DOM(10) = {1, 2, 10) CMPUT 229 - Computer Organization and Architecture I 7 8 9 10 28
Dominance Intuition 1 Imagine a source of light at the start node, and that the edges are optical fibers S 2 3 4 To find which nodes are dominated by a given node, place an opaque barrier at that node and observe which nodes became dark. CMPUT 229 - Computer Organization and Architecture I 5 6 7 8 9 10 29
Dominance Intuition 1 The start node dominates all nodes in the flowgraph. S 2 3 4 5 6 7 8 9 10 CMPUT 229 - Computer Organization and Architecture I 30
Dominance Intuition 1 Which nodes are dominated by node 3? S 2 3 4 5 6 7 8 9 10 CMPUT 229 - Computer Organization and Architecture I 31
Dominance Intuition 1 Which nodes are dominated by node 3? S 2 3 4 Node 3 dominates nodes 3, 4, 5, 6, 7, 8, and 9. 5 6 7 8 9 10 CMPUT 229 - Computer Organization and Architecture I 32
Dominance Intuition 1 Which nodes are dominated by node 7? S 2 3 4 Node 7 only dominates itself. 5 6 7 8 9 10 CMPUT 229 - Computer Organization and Architecture I 33
Live Values When allocating registers for a basic block, a compiler needs to compute which values are live at the entrance of a basic block. We say that a value is live at any point of a program if there is a possibility that the value will be used in the program. Which registers contain a live value in the following basic block? lw addu sw lw sw $t 8, 0($t 6) $t 6, 12 $t 8, 0($t 9) $t 7, -8($t 6) $t 9, 12 $t 7, -8($t 9) $t 8, -4($t 6) $t 8, -4($t 9) CMPUT 229 - Computer Organization and Architecture I Registers $t 6 and $t 9 contain live values. 34