CMPUT 229 Fall 2003 Topic 6 Logic Multiply

CMPUT 229 - Fall 2003 Topic 6: Logic, Multiply and Divide Operations José Nelson Amaral CMPUT 229 - Computer Organization and Architecture I 1

Reading Assignment Appendix A: Section A. 9 Chapter 4: Section 4. 2, 4. 3, 4. 4 parts of sections of 4. 5 -4. 7 CMPUT 229 - Computer Organization and Architecture I 2

Operating with Unsigned Numbers If a byte is loaded into a register using the lb instruction, the byte will be sign-extended to 32 bits before it is written into the destination register. For instance, if the byte 0 x 84 is stored in position 0 x 10008000 and the following instruction is executed: lb $t 0, 0($gp) # $gp = 0 x 1000 8000 What is the value of $t 0 after this instruction is executed? $t 0 = 0 x. FFFFFF 84 How could we get 0 x 00000084 loaded into $t 0 from position 0 x 10008000? We need to use the load byte unsigned instruction for that effect: lbu $t 0, 0($gp) CMPUT 229 - Computer Organization and Architecture I 3

sltu and sltiu Sometimes when comparing two values, we want to treat them as unsigned numbers. For this situation MIPS offers two instructions: set less than unsigned (sltu) and set less than immediate unsigned (sltiu) Example: Assume that the following values are stored in $s 0 and $s 1 $s 0 = 0 x. FFFF $s 1 = 0 x 0000 0001 What are the values of $t 0 and $t 1 after the following instructions are executed? slt $t 0, $s 1 sltu $t 1, $s 0, $s 1 $t 0 = 1 $t 1 = 0 CMPUT 229 - Computer Organization and Architecture I 4

addu, addiu, and subu MIPS also offers unsigned arithmetic operations that do not cause exceptions on overflow: addu: add unsigned addiu: add immediate unsigned subu: subtract unsigned The only difference between the signed instructions add, addi and sub, and the unsigned ones addu, addiu, and subu, is that the unsigned ones do not generate overflow exceptions. The immediate fields of addiu and sltiu are sign-extended! CMPUT 229 - Computer Organization and Architecture I 5 Pat-Hen. pp. 222 and pp. 230

Logical Shifts MIPS provides bit shifting operations such as shift left logical (sll), and shift right logical (srl). When a logical shift occurs, the new bits introduced in the word are always zeros. Example: Assume that $s 0 = 0000 0000 1101 What would $t 2 contain after the following instruction is executed? sll $t 2, $s 0, 8 # $t 2 $s 0 << 8 $t 2 = 0000 0000 1101 0000 CMPUT 229 - Computer Organization and Architecture I Pat-Hen. pp. 226 6

Example of logical shifts Propose a sequence of two MIPS instructions that performs the following binary transformation in $s 0 (without affecting any other register): Before: $s 0 = bbbb bbbb bbcc ccbb After: $s 0 = 0000 0000 cccc Solution: sll $s 0, 22 # $s 0 << 22 # $s 0 = cccc bb 00 0000 0000 srl $s 0, 24 # $s 0 >> 24 # $s 0 = 0000 0000 cccc CMPUT 229 - Computer Organization and Architecture I Pat-Hen. pp. 229 7

Integer Multiplication and Division using Shifts Shift operations can be used to perform integer multiplication and division by powers of 2. For example to multiply the integer stored in $t 1 by 4, we could use the following instruction: sll $t 1, 2 # $t 1 << 2 = 4 $t 1 If $t 1 contained, for instance 0 x 00000008: Before: $t 1 = 0000 0000 1000 = 23 = 810 After: $t 1 = 0000 0000 0010 0000 = 25 = 3210 Similarly, a shift right by 2 is equivalent to an integer division by 4. CMPUT 229 - Computer Organization and Architecture I 8

Arithmetic Shifts What happens if we shift the number -16 to the right by 2? +16 = 0000 0000 0001 0000 1111 1111 1110 1111 + 0000 0000 0001 -16 = 1111 1111 0000 After a shift right logical of 2 we get: 0011 1111 1111 1100 What is the decimal value represented by this binary number? 001111 1111 00 = +1, 073, 741, 820 CMPUT 229 - Computer Organization and Architecture I 9

Something is amiss! Thus our logical right shift of -16: -16 = 1111 1111 0000 by 2 resulted in: +1, 073, 741, 820 = 001111 1111 00 If we want to use shift right as a fast alternative to division by powers of two, we need a different shift operation! CMPUT 229 - Computer Organization and Architecture I 10

Shift Right Arithmetic MIPS provides a shift right arithmetic (sra) operation that preserves the sign of the number shifted. If $t 0 = 0 x. FFFF 0 = -1610 The following instruction: sra $t 0, 2 # $t 0 >>a 2 = $t 0/4 will produce: $t 0 = 0 x. FFFF FFFC = -410 CMPUT 229 - Computer Organization and Architecture I 11

A Note in Binary-to. Decimal Conversion We wanted to convert the following binary number to decimal: X = 0011 1111 1111 1100 When converting a positive binary number that has a long sequence of 1’s into decimal, is it useful to use the following observations: 0011 1111 1111 - 0000 0000 0011 1111 1111 1100 0000 0000 - 0000 0000 0001 0011 1111 1111 CMPUT 229 - Computer Organization and Architecture I 12

A Note in Binary-to. Decimal Conversion We want to convert the following binary number to decimal: X = 0011 1111 1111 1100 When converting a positive binary number that has a long sequence of 1’s into decimal, is it useful to use the following observations: 0011 1111 1111 = Y - 0000 0000 0011 = 3 0011 1111 1111 1100 = X 0100 0000 0000 = 230 - 0000 0000 0001 = 1 0011 1111 1111 = Y X = Y - 3 = 230 -1 - 3 = 210 210 -4 X = 1024 - 4 - Computer = +1, 073, 741, 820 CMPUT 229 Organization and Architecture I 13

Variable Shifts Sometimes we want to shift a value by a variable number of bits (computed by an algorithm, for instance). For this cases, MIPS provides the shift left logical variable (sllv), shift right logical variable (srlv), and shift right arithmetic variable (srav) instructions Example: What is the value stored in $s 1 after the following instructions are executed? addi $t 0, $zero, 4 addi $s 0, $zero, -128 srav $s 1, $s 0, $t 0 $s 1 = -128/16 = -8 CMPUT 229 - Computer Organization and Architecture I 14

Bitwise Logic Operations Bitwise logic instructions cause the values stored in two registers to be combined, bit by bit, by a logic operator. MIPS implements or, and, not, nor, xor. It also has immediate versions: andi, ori, xori Example: or $t 0, $t 1, $t 2 # $t 0 $t 1 | $t 2 CMPUT 229 - Computer Organization and Architecture I Pat-Hen. pp. 227 15

Logic Functions NOT If X=0 then X’=1 If X=1 then X’=0 AND If A=1 AND B=1 then C=1 otherwise C=0 OR If A=1 OR B=1 then C=1 otherwise C=0 CMPUT 229 - Computer Organization and Architecture I Pat-Hen. pp. 231 16

Logic Functions NOR If X=0 AND Y=0, then C=1 XOR If X=1 OR Y=1, but not both of them, then C=1 CMPUT 229 - Computer Organization and Architecture I 17

Bitwise logic example Example: The following is the code of a leaf procedure. How would you describe what this procedure does? end: add andi beq add jr $v 0, $zero $t 1, $a 0, 3 $t 1, $zero, end $v 0, $zero, 1 $ra CMPUT 229 - Computer Organization and Architecture I 18

Multiply in MIPS Multiplication in Decimal: 88 two digits operands x 45 440 The multiplication of two 2 -digit 352 operands resulted in a 4 -digit product. 3960 four digit product Similarly, the binary multiplication of two 32 -bit operands produces a 64 bit product. The MIPS has two special register, Hi and Lo, to store the high and low parts of the 64 bit product generated by a multiply operation. CMPUT 229 - Computer Organization and Architecture I Pat-Hen. pp. 264 19

Multiply in MIPS has a multiply instruction, mult, and a multiply unsigned, multu, instruction. MIPS also provides two special instructions to move data from Hi and Lo to the general purpose registers: move from Lo, mflo, and move from Hi, mfhi. Neither the mult nor the multu instruction detects overflow. Example: mult $s 0, $s 1 # Hi high[$s 0 $s 1]; Lo low[$s 0 $s 1]; MIPS assembler implements a pseudo assembly instruction that moves the values from Hi and Lo into a register: mul $s 0, $s 1, $s 2 # $s 0 $s 1 $s 2 CMPUT 229 - Computer Organization and Architecture I 20

Integer Division Remainder The divide, div, instruction produces the quotient of the division in Lo and the remainder in Hi. Quotient The MIPS divide instruction ignores overflow. The MIPS assembler also provides a three register pseudo divide instruction to place the quotient in an specified register. CMPUT 229 - Computer Organization and Architecture I Pat-Hen. pp. 273 21