Clock Algorithm Example Process 1 PT Memory Address

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Clock Algorithm Example Process 1 PT Memory Address Space 0 Frame Table 1 F

Clock Algorithm Example Process 1 PT Memory Address Space 0 Frame Table 1 F r a m e 2 U p d a te D i s k V a l i d 3 4 Process 2 Backing Store F r a m e CSE 5343/7343 Fall 2002 Address Space PT F R P r ef I e D e U p d a te D i s k V a l i d 1

Start State Memory 0 Frame Table 1 1 1 2 3 4 CSE 5343/7343

Start State Memory 0 Frame Table 1 1 1 2 3 4 CSE 5343/7343 Fall 2002 1 1 1 F R P r ef I e D e Backing Store 2

Create Process 1 / Load into VM Process 1 PT Memory 0 Frame Table

Create Process 1 / Load into VM Process 1 PT Memory 0 Frame Table 1 1 1 2 3 4 CSE 5343/7343 Fall 2002 1 F r a m e U p d a te ^ 0 ^ 0 D i s k V a l i d Address Space A B C D 1 1 F R P r ef I e D e Backing Store 3

Load 1 st Two Pages of P 1 into Memory Process 1 PT Memory

Load 1 st Two Pages of P 1 into Memory Process 1 PT Memory 0 1 0 ^ 1 3 0 ^ 1 ^ 0 D i s k V a l i d Frame Table 1 A 1 0 2 3 1 1 0 B 4 CSE 5343/7343 Fall 2002 F r a m e U p d a te Address Space A B C D 1 1 F R P r ef I D e e Backing Store 4

P 1 Begins Executing using Pages 0&1 Process 1 PT Memory 0 1 0

P 1 Begins Executing using Pages 0&1 Process 1 PT Memory 0 1 0 ^ 1 3 0 ^ 1 ^ 0 D i s k V a l i d Frame Table 1 A 1 0 1 2 3 1 1 0 1 B 4 CSE 5343/7343 Fall 2002 F r a m e U p d a te Address Space A B C D 1 1 F R P r ef I D e e Backing Store 5

Create Process 2 / Load into VM Process 1 PT Memory 0 1 0

Create Process 2 / Load into VM Process 1 PT Memory 0 1 0 ^ 1 3 0 ^ 1 ^ 0 D i s k V a l i d Frame Table 1 A 1 0 1 2 3 1 1 0 1 B 4 F r a m e A B C D 1 Process 2 1 Address Space PT F R P r ef I D e e F r a m e CSE 5343/7343 Fall 2002 U p d a te Address Space U p d a te ^ 0 ^ 0 D i s k V a l i d D Backing Store E F 6

Load 1 st Two Pages of P 2 into Memory Process 1 PT Memory

Load 1 st Two Pages of P 2 into Memory Process 1 PT Memory 0 1 2 3 E A D B 4 1 0 ^ 1 3 0 ^ 1 ^ 0 D i s k V a l i d Frame Table 0 0 2 0 1 1 F r a m e A B C D Process 2 1 F R P r ef I D e e Address Space PT 2 0 ^ 1 0 0 ^ 1 ^ 0 D i s k V a l i d F r a m e CSE 5343/7343 Fall 2002 U p d a te Address Space U p d a te D Backing Store E F 7

P 2 Begins Executing using Pages 0&1 – Update Page 1 Process 1 PT

P 2 Begins Executing using Pages 0&1 – Update Page 1 Process 1 PT Memory 0 1 2 3 E A D B 4 1 0 ^ 1 3 0 ^ 1 ^ 0 D i s k V a l i d Frame Table 0 1 2 0 1 1 F r a m e A B C D Process 2 1 F R P r ef I D e e Address Space PT 2 0 ^ 1 0 1 ^ 0 D i s k V a l i d F r a m e CSE 5343/7343 Fall 2002 U p d a te Address Space U p d a te D Backing Store E F 8

P 2 Page Fault for Page 2 – P 1 Executes During Paging I/O

P 2 Page Fault for Page 2 – P 1 Executes During Paging I/O Process 1 PT Memory 0 1 2 3 4 E A D B F CSE 5343/7343 Fall 2002 1 0 ^ 1 3 0 ^ 1 ^ 0 D i s k V a l i d Frame Table 0 1 2 0 1 1 F r a m e U p d a te Address Space A B C D Process 2 0 0 F R r ef e e 2 P I D Address Space PT 2 0 ^ 1 0 1 ^ 1 4 0 ^ 1 F r a m e U p d a te D i s k V a l i d D Backing Store E F 9

I/O Completion Interrupt – P 2 Begins Execution - Updates Page 2 Process 1

I/O Completion Interrupt – P 2 Begins Execution - Updates Page 2 Process 1 PT Memory 0 1 2 3 4 E A D B F CSE 5343/7343 Fall 2002 1 0 ^ 1 3 0 ^ 1 ^ 0 D i s k V a l i d Frame Table 0 1 2 0 1 1 F r a m e U p d a te Address Space A B C D Process 2 0 1 F R r ef e e 2 P I D Address Space PT 2 0 ^ 1 0 1 ^ 1 4 1 ^ 1 F r a m e U p d a te D i s k V a l i d D Backing Store E F 10

Timer Interrupt – P 1 Begins Execution – Page Fault for Page 2 –

Timer Interrupt – P 1 Begins Execution – Page Fault for Page 2 – No Free Frames – Initiate Clock Algorithm for Page Replacement Process 1 PT Memory 0 E Frame Table 0 0 1 2 3 4 A D B F CSE 5343/7343 Fall 2002 1 0 ^ 1 3 0 ^ 1 ^ 0 D i s k V a l i d 2 0 01 1 0 01 F R r ef e e 2 P I D F r a m e U p d a te Address Space A B C D Process 2 Address Space PT 2 0 ^ 1 0 1 ^ 1 4 2 ^ 1 F r a m e U p d a te D i s k V a l i d D Backing Store E F 11

Replace Frame 0 – Must swap out to disk as updated Process 1 PT

Replace Frame 0 – Must swap out to disk as updated Process 1 PT Memory 0 1 2 3 4 C A D B F CSE 5343/7343 Fall 2002 Frame Table 0 0 1 0 ^ 1 3 0 ^ 1 0 0 ^ 1 ^ 0 D i s k V a l i d 1 0 0 2 0 0 1 F r a m e U p d a te Address Space A B C D Process 2 0 0 F R r ef e e 2 P I D Address Space PT 2 0 ^ 1 0 1 ^ 0 4 2 ^ 1 F r a m e U p d a te D i s k V a l i d D Backing Store E F 12