Chapter One Introduction to Pipelined Processors Pipelining It

Chapter One Introduction to Pipelined Processors

Pipelining • It is a technique of decomposing a sequential process into sub-operations which can be executed in a special dedicated segment that operates concurrently with all other segments • It improves processor performance by overlapping the execution of multiple instructions

Example

Pipelining: Its Natural! • Laundry Example • Ann, Brian, Cathy, Dave each have one load of clothes to wash, dry, and fold • Washer takes 30 minutes • Dryer takes 40 minutes • Folder takes 20 minutes A B C D

Sequential Laundry 6 PM 7 8 9 10 11 Midnight Time 30 40 20 T a s k O r d e r A B C D • Sequential laundry takes 6 hours for 4 loads • If they knew pipelining, how fast their laundry would be?

Pipelined Laundry starts work ASAP 6 PM 7 8 9 10 11 Time 30 40 T a s k O r d e r 40 40 40 20 A B C D • Pipelined laundry takes 3. 5 hours for 4 loads Midnight

Observations on Pipeline Processing • It works well if time taken by each stage is nearly the same – If this time is T seconds, then the pipeline produces output at every T seconds – If time taken by each stage varies, then the slower stage becomes a bottleneck in the progress

Pipelined Laundry 6 PM 30 A B C D 7 30 30 8 30 30 30 • Suppose each stage Time takes 30 minutes 9 PM 30 30 30 • Time to wash, dry, and fold one load is still the same (90 minutes) • Then the work will get over in 3 hours

Pipelined Laundry 6 PM 7 8 9 10 11 Midnight Time 30 40 T a s k O r d e r 40 40 40 20 A B C D • Here 40 minutes takes over the pipeline cycle

Example for pipeline in computer • Consider that the process of execution of an instruction involves four major steps: 1. Instruction Fetch (IF): from main memory 2. Instruction Decoding (ID): which identifies the operation to be performed 3. Operand Fetch(OF): if needed in execution 4. Execution(EX): of the decoded arithmetic/logic operation

Example for pipeline in computer • In a non-pipelined computer, these four steps must be completed before the next instruction can be issued

Example for pipeline in computer • In a pipelined computer, successive stages are executed in an overlapped fashion

Example for pipeline in computer • Theoretically a k-stage linear pipeline could be k-times faster. • But this ideal speedup cannot be achieved due to factors like : – Data dependency – Branch and Interrupts

Principles of Linear Pipelining

Principles of Linear Pipelining • In pipelining, we divide a task into set of subtasks. • The precedence relation of a set of subtasks {T 1, T 2, …, Tk} for a given task T implies that the same task Tj cannot start until some earlier task Ti finishes. • The interdependencies of all subtasks form the precedence graph.

Principles of Linear Pipelining • With a linear precedence relation, task Tj cannot start until earlier subtasks { Ti} for all (i < j) finish. • A linear pipeline can process subtasks with a linear precedence graph.

Principles of Linear Pipelining • A pipeline which can process successive subtasks if • Subtasks have linear precedence order • Each subtasks take nearly same time to complete

Basic Linear Pipeline • L: latches, interface between different stages of pipeline • S 1, S 2, etc. : pipeline stages

Basic Linear Pipeline • It consists of cascade of processing stages. • Stages : Pure combinational circuits performing arithmetic or logic operations over the data flowing through the pipe. • Stages are separated by high speed interface latches. • Latches : Fast Registers holding intermediate results between stages • Information Flow are under the control of common clock applied to all latches

Basic Linear Pipeline • L: latches, interface between different stages of pipeline • S 1, S 2, etc. : pipeline stages

Basic Linear Pipeline • The flow of data in a linear pipeline having four stages for the evaluation of a function on five inputs is as shown below:

Basic Linear Pipeline • The vertical axis represents four stages • The horizontal axis represents time in units of clock period of the pipeline.

Clock Period (τ) for the pipeline • Let τi be the time delay of the circuitry Si and t 1 be time delay of latch. • Then the clock period of a linear pipeline is defined by • The reciprocal of clock period is called clock frequency (f = 1/τ) of a pipeline processor.

Performance of a linear pipeline • Consider a linear pipeline with k stages. • Let T be the clock period and the pipeline is initially empty. • Starting at any time, let us feed n inputs and wait till the results come out of the pipeline. • First input takes k periods and the remaining (n-1) inputs come one after the another in successive clock periods. • Thus the computation time for the pipeline Tp is Tp = k. T+(n-1)T = [k+(n-1)]T

Performance of a linear pipeline • For example if the linear pipeline have four stages with five inputs. • Tp = [k+(n-1)]T = [4+4]T = 8 T

Performance Parameters The various performance parameters of pipeline are : 1. Speed-up 2. Throughput 3. Efficiency •

Speedup • Speedup is defined as Speedup = Time taken for a given computation by a non-pipelined functional unit Time taken for the same computation by a pipelined version • Assume a function of k stages of equal complexity which takes the same amount of time T. • Non-pipelined function will take k. T time for one input. • Then Speedup = nk. T/(k+n-1)T = nk/(k+n-1)