Chapter 8 Main Memory Operating System Concepts 9

Chapter 8: Main Memory Operating System Concepts – 9 th Edition

Chapter 8: Memory Management n Background n Swapping n Contiguous Memory Allocation n Segmentation n Paging n Structure of the Page Table Operating System Concepts – 9 th Edition 8. 2

Objectives n To provide a detailed description of various ways of organizing memory hardware n To discuss various memory-management techniques, including paging and segmentation Operating System Concepts – 9 th Edition 8. 3

Background n Program must be brought (from disk) into memory and placed within a process for it to be run n Main memory and registers are only storage that CPU can access directly n Memory unit only sees a stream of addresses + read requests, or address + data and write requests n Register access in one CPU clock (or less) n Main memory can take many cycles, causing a stall n Cache sits between main memory and CPU registers n Protection of memory required to ensure correct operation Operating System Concepts – 9 th Edition 8. 4

Base and Limit Registers n A pair of base and limit registers define the logical address space n CPU must check every memory access generated in user mode to be sure it is between base and limit for that user Operating System Concepts – 9 th Edition 8. 5

Hardware Address Protection Operating System Concepts – 9 th Edition 8. 6

Address Binding n Programs on disk, ready to be brought into memory to execute form an input queue l n Inconvenient to have first user process physical address always at 0000 l n Without support, must be loaded into address 0000 How can it not be? Further, addresses represented in different ways at different stages of a program’s life l Source code addresses usually symbolic l Compiled code addresses bind to relocatable addresses 4 l Linker or loader will bind relocatable addresses to absolute addresses 4 l i. e. “ 14 bytes from beginning of this module” i. e. 74014 Each binding maps one address space to another Operating System Concepts – 9 th Edition 8. 7

Binding of Instructions and Data to Memory n Address binding of instructions and data to memory addresses can happen at three different stages l Compile time address binding: If memory location known a priori, absolute code can be generated; must recompile code if starting location changes. ex) MS-DOS. com l Link time binding: dynamic vs. static libraries l Load time binding: Must generate relocatable code if memory location is not known at compile time l Execution time binding: Binding delayed until run time if the process can be moved during its execution from one memory segment to another 4 Need hardware support for address maps (e. g. , base and limit registers) Operating System Concepts – 9 th Edition 8. 8 < Multistep Processing of a User Program >

Logical vs. Physical Address Space n The concept of a logical address space that is bound to a separate physical address space is central to proper memory management l Logical address – generated by the CPU; also referred to as virtual address l Physical address – address seen by the memory unit n Logical and physical addresses are the same in compile-time and load-time address-binding schemes; n logical (virtual) and physical addresses differ in execution-time address-binding scheme n Logical address space is the set of all logical addresses generated by a program n Physical address space is the set of all physical addresses generated by a program Operating System Concepts – 9 th Edition 8. 9

Memory-Management Unit (MMU) n Hardware device that at run time maps virtual to physical address n To start, consider simple scheme where the value in the relocation register is added to every address generated by a user process at the time it is sent to memory user process 가상주소 + relocation register l Base register now called relocation register l MS-DOS on Intel 80 x 86 used 4 relocation registers value(address) Physical address n The user program deals with logical addresses; it never sees the real physical addresses l Execution-time binding occurs when reference is made to location in memory l Logical address bound to physical addresses Operating System Concepts – 9 th Edition 8. 10

Dynamic relocation using a relocation register n Routine is not loaded until it is called n Better memory-space utilization; unused routine is never loaded n All routines kept on disk in relocatable load format n Useful when large amounts of code are needed to handle infrequently occurring cases n No special support from the operating system is required l Implemented through program design l OS can help by providing libraries to implement dynamic loading Operating System Concepts – 9 th Edition 8. 11

Dynamic Linking n Static linking – system libraries and program code combined by the loader into the binary program image n Dynamic linking –linking postponed until execution time n Small piece of code, stub, used to locate the appropriate memory-resident library routine n Stub replaces itself with the address of the routine, and executes the routine n Operating system checks if routine is in processes’ memory address l If not in address space, add to address space n Dynamic linking is particularly useful for libraries n System also known as shared libraries n Consider applicability to patching system libraries l Versioning may be needed Operating System Concepts – 9 th Edition 8. 12

Swapping n A process can be swapped temporarily out of memory to a backing store, and then brought back into memory for continued execution l Total physical memory space of processes can exceed physical memory n Backing store – fast disk large enough to accommodate copies of all memory images for all users; must provide direct access to these memory images n Roll out, roll in – swapping variant used for priority-based scheduling algorithms; lower-priority process is swapped out so higher-priority process can be loaded and executed l The current program or program segment is stored (rolled out) on disk, and another program is brought into (rolled in) that memory space n Major part of swap time is transfer time; total transfer time is directly proportional to the amount of memory swapped n System maintains a ready queue of ready-to-run processes which have memory images on disk Operating System Concepts – 9 th Edition 8. 13

Swapping (Cont. ) n Does the swapped out process need to swap back in to same physical addresses? n Depends on address binding method l Plus consider pending I/O to / from process memory space n Modified versions of swapping are found on many systems (i. e. , UNIX, Linux, and Windows) l Swapping normally disabled l Started if more than threshold amount of memory allocated l Disabled again once memory demand reduced below threshold l 즉, swapping 이 비활성화되었다가 할당된 메모리 양이 어느정도 이상이되면 다시 swapping 이 활성화됨 Operating System Concepts – 9 th Edition 8. 14

Schematic View of Swapping Operating System Concepts – 9 th Edition 8. 15

Context Switch Time including Swapping n If next processes to be put on CPU is not in memory, need to swap out a process and swap in target process n Context switch time can then be very high n 100 MB process swapping to hard disk with transfer rate of 50 MB/sec l Swap out time of 2000 ms l Plus swap in of same sized process l Total context switch swapping component time of 4000 ms (4 seconds) n Context switch time can be reduced if the size of memory swapped is reduced – by knowing how much memory really being used l System calls to inform OS of memory use via request_memory() and release_memory() l 즉, 사용자는 메모리 요구 사항의 변화가 있을 때, 이와 같은 시스템 호출을 사용하여, OS에게 메모리 요구 사항의 변화를 알려줌 Operating System Concepts – 9 th Edition 8. 16

Context Switch Time and Swapping (Cont. ) n Other constraints as well on swapping l Pending I/O – can’t swap out as I/O would occur to wrong process l Or always transfer I/O to kernel space, then to I/O device 4 Known as double buffering, adds overhead I/O는 OS의 kernel space와 이뤄지고 나중에 kernel stace에서 I/O혹은 해당 process와 통신이 이뤄짐 오버헤 드 유발 4 즉, n Standard swapping not used in modern operating systems l But modified version common 4 Swap only when free memory extremely low Operating System Concepts – 9 th Edition 8. 17

Swapping on Mobile Systems n Swapping is not typically supported l Flash memory based 4 Small amount of space 4 Limited 4 Poor number of write cycles (flash memory 쓰기 허용 횟수 제한) throughput between flash memory and CPU on mobile platform n Instead use other methods if free memory is low l i. OS asks apps to voluntarily relinquish allocated memory 4 Read-only 4 Failure data thrown out and reloaded from flash if needed to free can result in termination l Android terminates apps if low free memory, but first writes application state to flash for fast restart l Both OSes support paging as discussed below Operating System Concepts – 9 th Edition 8. 18

Contiguous Allocation n Main memory must support both OS and user processes n Limited resource, must allocate efficiently n Contiguous allocation is one early method l If sufficient contiguous memory is found, the process is allocated memory to start its execution. l Otherwise, it is added to a queue of waiting processes until sufficient free contiguous memory is available l The contiguous memory allocation scheme can be implemented in operating systems with the help of two registers, known as the base and limit registers. n Main memory usually into two partitions: l Resident operating system, usually held in low memory address space near interrupt vector l User processes then held in high memory address space l Each process contained in single contiguous section of memory Operating System Concepts – 9 th Edition 8. 19

Contiguous Allocation (Cont. ) n Relocation registers (재배치 레지스터) used to protect user processes from each other, and from changing operating-system code and data l Base register contains value of smallest physical address l Limit register contains range of logical addresses – each logical address must be less than the limit register l MMU maps logical address dynamically l Can then allow actions such as kernel code being transient and kernel changing size 4 Relocation register를 사용하면 OS(kernel)는 실행 중이라 도 그 크기 변경될 수 있음 4 OS가 지원하던 어떤 주변장치를 향후 더 이상 사용할 필요 없다면 OS는 해당 주변장치 관련 코드를 메모리에 유지할 필요 없음 (이를 transient OS code라고 함) Operating System Concepts – 9 th Edition 8. 20

Hardware Support for Relocation and Limit Registers 어떤 프로세스는 자신이 소 유하지 않은 메모리 공간 접 근할 수 없게 됨 Operating System Concepts – 9 th Edition 8. 21

Multiple-partition allocation n Multiple-partition allocation l Degree of multiprogramming limited by number of partitions l Variable-partition sizes for efficiency (sized to a given process’ needs) l Hole – block of available memory; holes of various size are scattered throughout memory l When a process arrives, it is allocated memory from a hole large enough to accommodate it l Process exiting frees its partition, adjacent free partitions combined l Operating system maintains information about: a) allocated partitions b) free partitions (hole) hole Operating System Concepts – 9 th Edition 8. 22

Dynamic Storage-Allocation Problem How to satisfy a request of size n from a list of free holes? n First-fit: Allocate the first hole that is big enough l 즉, 첫번째 사용 가능한 가용 공간을 할당함. 검색 대상 시작부터 찾거 나 혹은 지난번 검색이 끝났던 곳에서 시작될 수 있음 n Best-fit: Allocate the smallest hole that is big enough; must search entire list, unless ordered by size l 사용 가능한 공간 중에서 (프로세스 크기를 만족시키면서) 가장 작은 것 선택 n Worst-fit: Allocate the largest hole; must also search entire list l 가장 큰 가용 공간을 선택 First-fit and best-fit better than worst-fit in terms of speed and storage utilization Operating System Concepts – 9 th Edition 8. 23

Fragmentation n External Fragmentation – total memory space exists to satisfy a request, but it is not contiguous l 프로세스가 메모리에 적재/ 제거되는 일이 반복되면서 free space가 조각화됨 n Internal Fragmentation – allocated memory may be slightly larger than requested memory; this size difference is memory internal to a partition, but not being used l 필요한 메모리 공간보다 더 많이 할당됨 n First fit analysis reveals that given N blocks allocated, 0. 5 N blocks lost to fragmentation l 1/3 may be unusable -> 50 -percent rule Internal fragmentation Operating System Concepts – 9 th Edition 8. 24

Fragmentation (Cont. ) n Reduce external fragmentation by compaction (압축) l Shuffle memory contents to place all free memory together in one large block l Compaction is possible only if relocation is dynamic, and is done at execution time l I/O problem 4 Latch 4 Do job in memory while it is involved in I/O only into OS buffers n Now consider that backing store has same fragmentation problems Operating System Concepts – 9 th Edition 8. 25

Segmentation n Memory-management scheme that supports user view of memory n A program is a collection of segments l A segment is a logical unit such as: main program procedure function method object local variables, global variables common block stack symbol table arrays Operating System Concepts – 9 th Edition 8. 26

User’s View of a Program Operating System Concepts – 9 th Edition 8. 27

Segmentation Architecture n Logical address consists of a two tuple: <segment-number, offset>, n Segment table – maps two-dimensional physical addresses; each table entry has: l base – contains the starting physical address where the segments reside in memory l limit – specifies the length of the segment n Segment-table base register (STBR) points to the segment table’s location in memory n Segment-table length register (STLR) indicates number of segments used by a program; segment number s is legal if s < STLR Operating System Concepts – 9 th Edition 8. 29

Segmentation Architecture (Cont. ) n Protection l With each entry in segment table associate: 4 validation bit = 0 illegal segment 4 read/write/execute valid/invalid privileges n Protection bits associated with segments; code sharing occurs at segment level n Since segments vary in length, memory allocation is a dynamic storage-allocation problem Operating System Concepts – 9 th Edition 8. 30

Segmentation Hardware • Segment base: segment 의 시작 주소 • Segment limit: segment 의 길이 • 논리주소는 • segment 번호 s와 segment 내의 변위(offset) d로 구성 • s: segment table 색인역할 논리주소 Operating System Concepts – 9 th Edition 8. 31

Example of the Segmentation • 총 5개의 segment가 있음: segment 0 ~4 • 각 segment는 physical memory에 저 장되어 있음 • Sement table은 memory내 실제 시작 주소(base)와 segment의 끝(limit) 정 보를 제공함 • ex) segment 2: 4300 번지에서 시작하 고 길이(limit)은 400 Byte임 Operating System Concepts – 9 th Edition 8. 32

Difference b/w Segmentation & Paging Segmentation Paging • Program is divided into variable size segments • Program is divided into fixed size pages • User(or compiler) is responsible for dividing the program into segments • Division into pages is performed by the OS • Segmentation is slower than paging • Paging is faster than segmentation • Segmentation is visible to the user • Paging is invisible to the user • Segmentation eliminates internal fragmentation • Paging suffers from internal fragmentation • Segmentation suffers from external fragmentation • There is no external fragmentation • Processor uses page number, offset to calculate absolute address • Processor uses segment number, offset to calculate absolute address • OS maintains a list of free holes in main memory • OS must maintain a free frame list reference: Advanced Microprocessors by A. P. Godse, CH 15 Operating System Concepts – 9 th Edition 8. 33

Paging n Physical address space of a process can be noncontiguous; process is allocated physical memory whenever the latter is available l Avoids external fragmentation l Avoids problem of varying sized memory chunks n Divide physical memory into fixed-sized blocks called frames l Size is power of 2, between 512 bytes and 16 Mbytes n Divide logical memory into blocks of same size called pages n Keep track of all free frames n To run a program of size N pages, need to find N free frames and load program n Set up a page table to translate logical to physical addresses n Backing store likewise split into pages n Still have Internal fragmentation Operating System Concepts – 9 th Edition 8. 34

Address Translation Scheme n Address generated by CPU is divided into: l Page number (p) – used as an index into a page table which contains base address of each page in physical memory l Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit l For given logical address space 2 m and page size 2 n Operating System Concepts – 9 th Edition 8. 35

Paging Hardware Operating System Concepts – 9 th Edition http: //ece-research. unm. edu/jimp/310/slides/os_essentials. html 8. 37

TLB(Translation Lookaside Buffers) Operating System Concepts – 9 th Edition http: //ece-research. unm. edu/jimp/310/slides/os_essentials. html 8. 38

Paging Model of Logical and Physical Memory Operating System Concepts – 9 th Edition 8. 39

Implementation of Page Table Page table is kept in main memory (page tables are said to be stored in the kernelowned physical memory. ) Operating System Concepts – 9 th Edition 8. 40

Implementation of Page Table n Page table is kept in main memory n Page-table base register (PTBR) points to the page table n Page-table length register (PTLR) indicates size of the page table n In this scheme every data/instruction access requires two memory accesses l One for the page table and one for the data / instruction n The two memory access problem can be solved by the use of a special fast-lookup hardware cache called associative memory or translation look-aside buffers (TLBs) Operating System Concepts – 9 th Edition 8. 41

Implementation of Page Table (Cont. ) n Some TLBs store address-space identifiers (ASIDs) in each TLB entry – uniquely identifies each process to provide address-space protection for that process l Otherwise need to flush at every context switch n TLBs typically small (64 to 1, 024 entries) n On a TLB miss, value is loaded into the TLB for faster access next time l Replacement policies must be considered l Some entries can be wired down for permanent fast access Operating System Concepts – 9 th Edition 8. 42

Associative Memory n Associative memory – parallel search n Address translation (p, d) l If p is in associative register, get frame # out l Otherwise get frame # from page table in memory Operating System Concepts – 9 th Edition 8. 43

Paging Hardware With TLB Operating System Concepts – 9 th Edition 8. 44

Memory Protection n Memory protection implemented by associating protection bit with each frame to indicate if read-only or read-write access is allowed l Can also add more bits to indicate page execute-only, and so on n Valid-invalid bit attached to each entry in the page table: l “valid” indicates that the associated page is in the process’ logical address space, and is thus a legal page l “invalid” indicates that the page is not in the process’ logical address space l Or use page-table length register (PTLR) n Any violations result in a trap to the kernel Operating System Concepts – 9 th Edition 8. 45

Valid (v) or Invalid (i) Bit In A Page Table Operating System Concepts – 9 th Edition 8. 46

Shared Pages n Shared code l One copy of read-only (reentrant) code shared among processes (i. e. , text editors, compilers, window systems) l Similar to multiple threads sharing the same process space l Also useful for interprocess communication if sharing of read-write pages is allowed n Private code and data l Each process keeps a separate copy of the code and data l The pages for the private code and data can appear anywhere in the logical address space Reentrant code can be safely re-entered, meaning that it can be called again even while a call to it is underway. Reentrant code keeps its state entirely in parameters and local variables, and doesn’t use static variables or global variables, and doesn’t share aliases to mutable objects with other parts of the program, or other calls to itself. ” Operating System Concepts – 9 th Edition 8. 47

Shared Pages Example Operating System Concepts – 9 th Edition 8. 48

Structure of the Page Table n Memory structures for paging can get huge using straight- forward methods l Consider a 32 -bit logical address space as on modern computers l Page size of 4 KB (212) l Page table would have 1 million entries (232 / 212) l If each entry is 4 bytes -> 4 MB of physical address space / memory for page table alone 4 That amount of memory used to cost a lot 4 Don’t want to allocate that contiguously in main memory n Hierarchical Paging n Hashed Page Tables n Inverted Page Tables Operating System Concepts – 9 th Edition 8. 49

Hierarchical Page Tables n Break up the logical address space into multiple page tables n A simple technique is a two-level page table n We then page the page table Operating System Concepts – 9 th Edition 8. 50

Two-Level Page-Table Scheme Operating System Concepts – 9 th Edition 8. 51

Two-Level Paging Example n A logical address (on 32 -bit machine with 1 K page size) is divided into: a page number consisting of 22 bits l a page offset consisting of 10 bits l n Since the page table is paged, the page number is further divided into: a 12 -bit page number l a 10 -bit page offset l n Thus, a logical address is as follows: n where p 1 is an index into the outer page table, and p 2 is the displacement within the page of the inner page table n Known as forward-mapped page table Operating System Concepts – 9 th Edition 8. 52

Address-Translation Scheme Operating System Concepts – 9 th Edition 8. 53

Hashed Page Tables n Common in address spaces > 32 bits l 즉, 주소 공간이 32 bit보다 커지면 가상 주소를 해쉬화해서 사용하 는 해쉬 페이지 테이블을 많이 사용함 n The virtual page number is hashed into a page table l This page table contains a chain of elements hashing to the same location n Each element contains (1) the virtual page number (2) the value of the mapped page frame (3) a pointer to the next element n Virtual page numbers are compared in this chain searching for a match l If a match is found, the corresponding physical frame is extracted Operating System Concepts – 9 th Edition 8. 54

Hashed Page Table • the virtual page number • the value of the mapped page frame • a pointer to the next element Operating System Concepts – 9 th Edition 8. 55

Inverted Page Table n Rather than each process having a page table and keeping track of all possible logical pages, track all physical pages n One entry for each real page of memory n Entry consists of the virtual address of the page stored in that real memory location, with information about the process that owns that page n Decreases memory needed to store each page table, but increases time needed to search the table when a page reference occurs n Use hash table to limit the search to one — or at most a few — page-table entries l TLB can accelerate access n But how to implement shared memory? l One mapping of a virtual address to the shared physical address Operating System Concepts – 9 th Edition 8. 56

Inverted Page Table Architecture 비교 inverted page table Operating System Concepts – 9 th Edition 8. 57

End of Chapter 8 Operating System Concepts – 9 th Edition