Chapter 8 Input and Output 8 1 Principles

Chapter 8 - Input and Output 8 -1 Principles of Computer Architecture Miles Murdocca and Vincent Heuring Chapter 8: Input and Output Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -2 Chapter Contents 8. 1 Simple Bus Architectures 8. 2 Bridge-Based Bus Architectures 8. 3 Communication Methodologies 8. 4 Case Study: Communication on the Intel Pentium Architecture 8. 5 Mass Storage 8. 6 Input Devices 8. 7 Output Devices Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -3 Simple Bus Architecture • A simplified motherboard of a personal computer (top view): Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -4 Simplified Illustration of a Bus Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -5 100 MHz Bus Clock Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -6 The Synchronous Bus • Timing diagram for a synchronous memory read (adapted from [Tanenbaum, 1999]). Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -7 The Asynchronous Bus • Timing diagram for asynchronous memory read (adapted from [Tanenbaum, 1999]). Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -8 Bus Arbitration • (a)Simple centralized bus arbitration; (b) centralized arbitration with priority levels; (c) decentralized bus arbitration. (Adapted from [Tanenbaum, 1999]). Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -9 Chapter 8 - Input and Output Bridge Based Bus Architecture • Bridging with dual Pentium II Xeon processors on Slot 2. (Source: http: //www. intel. com. ) Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -10 Chapter 8 - Input and Output Programmed I/O Flowchart for a Disk Transfer Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -11 Chapter 8 - Input and Output Interrupt Driven I/O Flowchart for a Disk Transfer Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -12 Chapter 8 - Input and Output DMA Transfer from Disk to Memory Bypasses the CPU Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -13 DMA Flowchart for a Disk Transfer Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -14 Chapter 8 - Input and Output Intel Memory and I/O Address Spaces Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -15 Chapter 8 - Input and Output Standard Intel Pentium Read and Write Bus Cycles Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -16 Chapter 8 - Input and Output Intel Pentium Burst Read Bus Cycle Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -17 Chapter 8 - Input and Output Intel Pentium Hold-Hold Acknowledge Bus Cycle Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -18 Chapter 8 - Input and Output A Magnetic Disk with Three Platters Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -19 Manchester Encoding • (a) Straight amplitude (NRZ) encoding of ASCII ‘F’; (b) Manchester encoding of ASCII ‘F’. Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

8 -20 Chapter 8 - Input and Output Organization of a Disk Platter with a 1: 2 Interleave Factor Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -21 Master Control Block Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -22 Magnetic Tape • A portion of a magnetic tape (adapted from [Hamacher, 1990]). Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -23 Magnetic Drum Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -24 Spiral Format for Compact Disk Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -25 ECMA-23 Keyboard Layout • Keyboard layout for the ECMA-23 Standard (2 nd ed. ). Shift keys are frequently placed in the B row. Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -26 The Dvorak Keyboard Layout Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -27 Bit Pad with Puck Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -28 Mouse and Trackball • A three-button mouse (left) and a three-button trackball (right). Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -29 Lightpen • A user selects an object with a lightpen. Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -30 Touchscreen • A user selects an object on a touchscreen. Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -31 Joystick • A joystick with a selection button and a rotatable rod: Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -32 Laser Printer • Schematic of a laser printer (adapted from [Tanenbaum, 1999]). Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -33 Cathode Ray Tube • A CRT with a single electron gun: Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -34 Display Controller • Display controller for a 640´ 480 color monitor (adapted from [Hamacher et al. , 1990]). Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -35 VHDL Specification Interface specification for the majority component -- Interface entity MAJORITY is port (A_IN, B_IN, C_IN: in BIT F_OUT: out BIT); end MAJORITY; Behavioral model for the majority component -- Body architecture LOGIC_SPEC of MAJORITY is begin -- compute the output using a Boolean expression F_OUT <= (not A_IN and B_IN and C_IN) or (A_IN and not B_IN and C_IN) or (A_IN and B_IN and not C_IN) or (A_IN and B_IN and C_IN) after 4 ns; end LOGIC_SPEC; Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -36 VHDL Specification (cont’) -- Package declaration, in library WORK package LOGIC_GATES is component AND 3 port (A, B, C : in BIT; X : out BIT); end component; component OR 4 port (A, B, C, D : in BIT; X : out BIT); end component; component NOT 1 port (A : in BIT; X : out BIT); end component; -- Interface entity MAJORITY is port (A_IN, B_IN, C_IN: in BIT F_OUT: out BIT); end MAJORITY; Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring

Chapter 8 - Input and Output 8 -37 VHDL Specification (cont’) -- Body -- Uses components declared in package LOGIC_GATES -- in the WORK library -- import all the components in WORK. LOGIC_GATES use WORK. LOGIC_GATES. all architecture LOGIC_SPEC of MAJORITY is -- declare signals used internally in MAJORITY signal A_BAR, B_BAR, C_BAR, I 1, I 2, I 3, I 4: BIT; begin -- connect the logic gates NOT_1 : NOT 1 port map (A_IN, A_BAR); NOT_2 : NOT 1 port map (B_IN, B_BAR); NOT_3 : NOT 1 port map (C_IN, C_BAR); AND_1 : AND 3 port map (A_BAR, B_IN, C_IN, I 1); AND_2 : AND 3 port map (A_IN, B_BAR, C_IN, I 2); AND_3 : AND 3 port map (A_IN, B_IN, C_BAR, I 3); AND_4 : AND 3 port map (A_IN, B_IN, C_IN, I 4); OR_1 : OR 3 port map (I 1, I 2, I 3, I 4, F_OUT); end LOGIC_SPEC; Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring