Chapter 5 Bipolar Junction Transistors Microelectronic Circuit Design

Chapter 5 Bipolar Junction Transistors Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 1

Chapter Goals • Explore physical structure of bipolar transistor • Understand bipolar transistor action and importance of carrier transport across base region • Study terminal characteristics of BJT. • Explore differences between npn and pnp transistors. • Develop Transport and Ebers-Moll models for bipolar device. • Define four operation regions of BJT. • Explore model simplifications for each operation region. • Understand origin and modeling of Early effect. • Present SPICE model for bipolar transistor. Provide examples of worstcase and Monte Carlo analysis of bias circuits. • Discuss bipolar current sources and current mirror. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 2

Physical Structure • Consists of 3 alternating layers of n- and p-type semiconductor called emitter (E), base (B) and collector (C). • Majority of current enters collector, crosses base region and exits through emitter. A small current also enters base terminal, crosses base-emitter junction and exits through emitter. • Carrier transport in the active base region directly beneath the heavily doped (n+) emitter dominates i-v characteristics of BJT. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 3

Transport Model for npn Transistor • Narrow width of the base region causes coupling between the two back to back pn junctions. • Emitter injects electrons into base region, almost all of them travel across narrow base and are removed by collector Jaeger/Blalock 7/1/03 • Base-emitter voltage v. BE and base-collector voltage v. BC determine currents in transistor and are said to be positive when they forward-bias their respective pn junctions. • The terminal currents are collector current(i. C ), base current (i. B) and emitter current (i. E). • Primary difference between BJT and FET is that i. B is significant while i. G = 0. Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 4

npn Transistor: Forward Characteristics Base current is given by is forward common-emitter current gain Emitter current is given by Forward transport current is is forward commonbase current gain IS is saturation current In this forward active operation region, VT = k. T/q =0. 025 V at room temperature Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 5

npn Transistor: Reverse Characteristics is reverse common-emitter current gain Base currents in forward and reverse modes are different due to asymmetric doping levels in emitter and collector regions. Emitter current is given by Reverse transport current is is reverse commonbase current gain Base current is given by Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 6

npn Transistor: Complete Transport Model Equations for Any Bias First term in both emitter and collector current expressions give current transported completely across base region. Symmetry exists between base-emitter and base-collector voltages in establishing dominant current in bipolar transistor. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 7

Transport Model Calculations: Example Evaluating the expressions for terminal currents, • Problem: Find terminal voltages and currents. • Given data: VBB = 0. 75 V, VCC = 5. 0 V, IS =10 -16 A, b. F =50, b. R =1 • Assumptions: Room temperature operation, VT =25. 0 m. V. • Analysis: VBE =0. 75 V, VBC = VBB- VCC =0. 75 V-5. 00 V=-4. 25 V Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 8

pnp Transistor: Structure • Voltages v. EB and v. CB are positive when they forward bias their respective pn junctions. • Collector current and base current exit transistor terminals and emitter current enters the device. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 9

pnp Transistor: Forward Characteristics Base current is given by Emitter current is given by Forward transport current is Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 10

pnp Transistor: Reverse Characteristics Base current is given by Emitter current is given by Reverse transport current is Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 11

pnp Transistor: Complete Transport Model Equations for Any Bias Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 12

Circuit Representation for Transport Models In npn transistor (expressions analogous for pnp transistors), total current traversing base is modeled by current source given by: Diode currents correspond directly to 2 components of base current. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 13

Ebers-Moll Model Forward characteristics (npn transistor) where Reverse characteristics (npn transistor) where Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 14

Ebers-Moll Model (contd. ) Complete Ebers-Moll equations (npn transistor) are given by combining forward and reverse characteristics: Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 15

Ebers-Moll Model (contd. ) Complete Ebers-Moll equations (pnp transistor) are given by: Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 16

Operation Regions of Bipolar Transistor Base-emitter junction Jaeger/Blalock 7/1/03 Base-collector junction Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 17

i-v Characteristics of Bipolar Transistor: Common-Emitter Output Characteristics For i. B=0, transistor is cutoff. If i. B >0, i. C also increases. For v. CE > v. BE, npn transistor is in forward active region, i. C = b. F i. B is independent of and v. CE. For v. CE< v. BE, transistor is in saturation. For v. CE< 0, roles of collector and emitter reverse. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 18

i-v Characteristics of Bipolar Transistor: Common-Base Output Characteristics For v. CB > 0, npn transistor is in forward active region, i. C = i. E is independent of and v. CE. For v. CB< 0, base-collector diode becomes forward-biased and i. C grows exponentially (in negative direction) as base-collector diode begins to conduct. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 19

i-v Characteristics of Bipolar Transistor: Common-Emitter Transfer Characteristic Defines relation between collector current and base-emitter voltage of transistor. Almost identical to transfer characteristic of pn junction diode Setting v. BC =0 in the collector-current expression, Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 20

Junction Breakdown Voltages • If reverse voltage across either of the two pn junctions in the transistor is too large, corresponding diode will break down. • Emitter is most heavily doped region and collector is most lightly doped region. • Due to doping differences, base-emitter diode has relatively low breakdown voltage (3 to 10 V). Collector-base diode can be designed to break down at much larger voltages. • Transistors must be selected in accordance with possible reverse voltages in circuit. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 21

Minority Carrier Transport in Base Region • BJT current dominated by diffusion nbo is equilibrium electron density in pof minority carriers (electrons in npn type base region. and holes in pnp transistors) across base region. • Base current consists of hole injection back into emitter and collector and small additional current to replenish holes lost to recombination with electrons in base. • Minority carrier concentrations at the 2 ends of base region are: Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 22

Minority Carrier Transport in Base Region (contd. ) • For narrow base, minority carrier density decreases linearly across base, diffusion current in base is: NAB= doping concentration in base ni 2= intrinsic carrier concentration (1010/cm 3) nbo = ni 2 / NAB • Saturation current for pnp transistor is • Due to higher mobility of electrons than holes, npn transistor conducts higher current than pnp for given set of applied voltages. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 23

Base Transit Time • Forward transit time is the time constant associated with storing minority-carrier charge Q required to establish career gradient in base region. • Base transit time places upper limit on useful operating frequency of transistor. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 24

Diffusion Capacitance • For v. BE and hence i. C to change, charge stored in base region must also change. • Diffusion capacitance in parallel with forward-biased base-emitter diode models the change in charge with v. BE. • Since transport current normally represents collector current in forward -active region, Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 25

Simplified Cutoff Region Model If we assume that where -4 k. T/q = -0. 1 V, then the transport model terminal current equations simplify to In cutoff region both junctions are reverse-biased, transistor is said to be in off state v. BE <0, v. BC <0 Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 26

Simplified Cutoff Region Model (Example) • • Problem: Estimate terminal currents using simplified transport model Given data: IS =10 -16 A, a. F = 0. 95, a. R = 0. 25, VBE = 0 V, VBC = -5 V Assumptions: Simplified transport model assumptions Analysis: From given voltages, we know that transistor is in cutoff. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 27

Simplified Forward-Active Region Model In forward-active region, emitter-base junction is forward-biased and collector-base junction is reverse-biased. v. BE > 0, v. BC < 0 If we assume that then the transport model terminal current equations simplify to BJT is often considered a current-controlled device, though fundamental forward active behavior suggests a voltage- controlled current source. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 28

Simplified Forward-Active Region Model (Example 1) • Problem: Estimate terminal currents and base-emitter voltage • Given data: IS =10 -16 A, a. F = 0. 95, VBC =VB - VC= -5 V, IE =100 m. A • Assumptions: Simplified transport model assumptions, room temperature operation, VT = 25. 0 m. V • Analysis: Current source forward-biases base-emitter diode, VBE > 0, VBC < 0, we know that transistor is in forward-active operation region. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 29

Simplified Forward-Active Region Model (Example 2) • Problem: Estimate terminal currents, base-emitter and base-collector voltages. • Given data: IS =10 -16 A, a. F = 0. 95, VC= +5 V, IB =100 m. A • Assumptions: Simplified transport model assumptions, room temperature operation, VT = 25. 0 m. V • Analysis: Current source causes base current to forward-bias baseemitter diode, VBE > 0, VBC <0, we know that transistor is in forward-active operation region. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 30

Simplified Circuit Model for Forward. Active Region • Current in base-emitter diode is amplified by common-emitter current gain b. F and appears at collector, base and collector currents are exponentially related to base-emitter voltage. • Base-emitter diode is replaced by constant voltage drop model(VBE = 0. 7 V) since it is forward-biased in forward-active region. • Dc base and emitter voltages differ by 0. 7 V diode voltage drop in forwardactive region. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 31

b-Cutoff Frequency, Transconductance and Transit Time • Forward-biased diffusion and reverse-biased pn junction capacitances of BJT cause current gain to be frequency-dependent. • Unity gain frequency is frequency at which current gain is unity fb = f. T / b. F is b-cutoff frequency • Transconductance is defined by: • Transit time is given by: Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 32

Simplified Forward-Active Region Model (Example 3) • • Problem: Find Q-point Given data: b. F = 50, b. R = 1 VBC =VB - VC= -9 V Assumptions: Forward-active region of operation, VBE = 0. 7 V Analysis: Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 33

Simplified Reverse-Active Region Model In reverse-active region, basecollector diode is forward-biased and base-emitter diode is reversebiased. Simplified equations are: Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 34

Simplified Reverse-Active Region Model • Problem: Find Q-point • Given data: b. F = 50, b. R = 1 VBE =VB - VE = -9 V. Combination of R and the voltage source forward biases base-collector junction. • Assumptions: Reverse-active region of operation, VBC = 0. 7 V • Analysis: Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 35

Simplified Saturation Region Model • In saturation region, both junctions are forward-biased and transistor operates with small voltage between collector and emitter. v. CESAT is saturation voltage for npn BJT. for No simplified expressions exist for terminal currents other than i. C + i. B = i. E. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 36

Early Effect and Early Voltage • As reverse-bias across collector-base junction increases, width of collectorbase depletion layer increases and width of base decreases (base-width modulation). • In practical BJT, output characteristics have a positive slope in forwardactive region, collector current in not independent of v. CE. • Early effect: When output characteristics are extrapolated back to point of zero i. C, curves intersect at common point v. CE = -VA (Early voltage) which lies between 15 V and 150 V. • Simplified equations (including Early effect): Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 37

BJT SPICE Model • Besides capacitances associated with the physical structure, additional components are: diode current i. S, capacitance CJS, related to the large area pn junction that isolates collector form substrate and one transistor form next. • RB is resistance between external base contact and intrinsic base region. • Collector current must pass through RC on its way to active region of collectorbase junction. • RE models any extrinsic emitter resistance in device. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 38

BJT SPICE Model Typical Values Saturation Current = 3 e-17 A Forward current gain = 100 Reverse current gain = 0. 5 Forward Early voltage = 75 V Base resistance = 250 W Collector Resistance = 50 W Emitter Resistance = 1 W Forward transit time = 0. 15 ns Reverse transit time = 15 ns Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 39

High Performane BJTs • Modern BJTs use combination of shallow and deep trench isolation processes to reduce device capacitances and transit times. • Have polysilicon emitters, narrow bases or Si. Ge base regions. • Si. Ge transistors exhibit cutoff frequencies > 100 GHz. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 40

Biasing for BJT • Goal of biasing is to establish known Q-point which in turn establishes initial operating region of transistor. • In BJT, Q-point is represented by (IC, VCE) for npn transistor or (IC, VEC) for pnp transistor. • Q-point controls values of diffusion capacitance, transconductance, input and output resistances. • In general, during circuit analysis, we use simplified mathematical relationships derived for specified operation region and Early voltage is assumed to be infinite. • The practical biasing circuits used for BJT are: – Four-Resistor Bias network – Two-Resistor Bias network Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 41

Four-Resistor Bias Network for BJT Q-point is (250 m. A, 4. 17 V) Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 42

Four-Resistor Bias Network for BJT (contd. ) • All calculated currents > 0, VBC = VBE - VCE = 0. 7 - 4. 32 = - 3. 62 V • Hence, base-collector junction is reverse-biased, assumption of forwardactive region operation is correct. • Load-line for the circuit is: The two points needed to plot the load line are (0, 12 V) and (314 m. A, 0). Resulting load line is plotted on common-emitter output characteristics. IB= 2. 7 m. A, intersection of corresponding characteristic with load line gives Qpoint. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 43

Four-Resistor Bias Network for BJT: Design Objectives • We know that for • This implies that IB << I 2. So that I 1 = I 2. So base current doesn’t disturb voltage divider action. Thus, Q-point is independent of base current as well as current gain. • Also, VEQ is designed to be large enough that small variations in VBE assumed value of won’t affect IE. • Current in base voltage divider network is limited by choosing This ensures that power dissipation in bias resistors is < 17 % of total quiescent power consumed by circuit and I 2 >> IB for b>50. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 44

Four-Resistor Bias Network for BJT: Design Guidelines • Choose Thevenin equivalent base voltage • Select R 1 to set I 1 = 9 IB. • Select R 2 to set I 2 = 10 IB. • RE is determined by VEQ and desired IC. • RC is determined by desired VCE. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 45

Four-Resistor Bias Network for BJT: Example • • Problem: Design 4 -resistor bias circuit with given parameters. Given data: IC =750 m. A, b. F = 100, VCC = 15 V, VCE = 5 V Assumptions: Forward-active operation region, VBE = 0. 7 V Analysis: Divide (VCC - VCE) equally between RE and RC. Thus, VE =5 V and VC =10 V Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 46

Two-Resistor Bias Network for BJT: Example • Problem: Find Q-point for pnp transistor in 2 -resistor bias circuit with given parameters. • Given data: b. F = 50, VCC = 9 V • Assumptions: Forward-active operation region, VEB = 0. 7 V • Analysis: Q-point is : (6. 01 m. A, 2. 88 V) Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 47

BJT Current Mirror • Collector terminal of a BJT in forwardactive region mimics behavior of a current source. • Output current is independent of VCC as long as VCC > 0. Thus, BJT is in forwardactive region, since VBC =- VCC. • Q 1 and Q 2 are assumed to be matched (with identical IS, b. F, b. R, VA, ) Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 48

BJT Current Mirror (contd. ) With infinite b. FO and VA, mirror ratio is unity. Finite current gain and Early voltage introduce mismatch in output and reference current of mirror Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 49

BJT Current Mirror: Example • • Problem: Find output current for given current mirror Given data: b. FO = 75, VA = 50 V Assumptions: Forward-active operation region, VBE = 0. 7 V Analysis: Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 50

BJT Current Mirror: Altering Mirror Ratio where ISO is saturation current of BJT with one unit of emitter area: AE =1(A). Actual dimensions of A are technology-dependent. Mirror ratio of BJT current mirror can be changed by changing relative sizes of emitters in the transistors. For ideal case, mirror ratio is determined only by ratio of the two emitter areas. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 51

BJT Current Mirror: Output Resistance • Current source using BJT doesn’t have an output current that is completely independent of terminal voltage across it, due to finite early voltage. Current source seems to have resistive component with it. • Ro is the small signal output resistance of the current mirror. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 52

Tolerances-Worst-Case Analysis: Example • Problem: Find worst-case values of IC and VCE. • Given data: b. FO = 75 with 50% tolerance, VA = 50 V, 5 % tolerance on VCC, 10% tolerance for each resistor. • Analysis: To maximize IC , VEQ should be maximized, RE should be minimized and opposite for minimizing IC. Extremes of RE are: 14. 4 k. W and 17. 6 k. W. To maximize VEQ, VCC and R 1 should be maximized, R 2 should be minimized and opposite for minimizing VEQ. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 53

Tolerances-Worst-Case Analysis: Example (contd. ) Extremes of VEQ are: 4. 78 V and 3. 31 V. Using these values, extremes for IC are: 283 m. A and 148 m. A. To maximize VCE, IC and RC should be minimized, and opposite for minimizing VEQ. Extremes of VCE are: 7. 06 V (forward-active region) and 0. 471 V (saturated, hence calculated values for VCE and IC actually not correct). Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 54

Tolerances-Monte Carlo Analysis • In real circuits, it is unlikely that various components will reach their extremes at the same time, instead they will have some statistical distribution. Hence worst-case analysis overestimates extremes of circuit behavior. • Monte Carlo analysis, values of each circuit parameter are randomly selected from possible distributions of parameters and used to analyze the circuit. • Several random parameter sets are generated, the statistical behavior of circuit is built up from analysis of many test cases. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 55

Tolerances-Monte Carlo Analysis: Example • Full results of Monte Carlo analysis of 500 cases of the 4 -resistor bias circuit yields mean values of 207 m. A and 4. 06 V for IC and VCE respectively which are close to values originally estimated from nominal circuit elements. Standard deviations are 19. 6 m. A and 0. 64 V respectively. Jaeger/Blalock 7/1/03 Microelectronic Circuit Design Mc. Graw-Hill Chap 5 - 56