Chapter 2 Introduction of IC Fabrication Hong Xiao

Chapter 2 Introduction of IC Fabrication Hong Xiao, Ph. D. hxiao 89@hotmail. com Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 1

Objectives • • Define yield and explain its importance Describe the basic structure of a cleanroom. Explain the importance of cleanroom protocols List four basic operations of IC processing Name at least six process bays in an IC fab Explain the purposes of chip packaging Describe the standard wire bonding and flip-chip bump bonding processes Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 2

Wafer Process Flow Materials IC Fab Metallization CMP Dielectric deposition Test Wafers Thermal Processes Masks Implant PR strip Photolithography Etch PR strip Packaging Final Test Design Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 3

Fab Cost • • • Fab cost is very high, > $1 B for 8” fab Clean room Equipment, usually > $1 M per tool Materials, high purity, ultra high purity Facilities People, training and pay Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 4

Wafer Yield Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 5

Die Yield Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 6

Packaging Yield Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 7

Overall Yield YT = YW YD YC Overall Yield determines whether a fab is making profit or losing money Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 8

How Does Fab Make (Loss) Money • Cost: – Wafer (8”): ~$150/wafer* – Processing: ~$1200 ($2/wafer/step, 600 steps) – Packing: ~$5/chip • Sale: – ~200 chips/wafer – ~$50/chip (low-end microprocessor in 2000) *Cost of wafer, chips per wafer, and price of chip varies, numbers here are choosing randomly based on general information. Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 9

How Does a Fab Make (Loss) Money Cost: • 100% yield: 150+1200+1000 = $2350/wafer • 50% yield: 150+1200+500 = $1850/wafer • 0% yield: 150+1200 = $1350/wafer Sale: • 100% yield: 200 50 = $10, 000/wafer • 50% yield: 100 50 = $5, 000/wafer • 0% yield: 0 50 = $0. 00/wafer • 100% yield: 10000 - 2350 = $7650/wafer Profit • 50% yield : 5000 - 1850 = $3150/wafer Margin: • 0% yield : 0 1350 = $1350/wafer Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 10

Question • If yield for every process step is 99%, what is the overall processing yield after 600 process steps? Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 11

Answer • It equals to 99% times 99% 600 times • 0. 99600 = 0. 0024 = 0. 24% • Almost no yield Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 12

Throughput • Number of wafers able to process – Fab: wafers/month (typically 10, 000) – Tool: wafers/hour (typically 60) • At high yield, high throughput brought Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 13

Defects and Yield Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 14

Yield and Die Size Killer Defects Y = 28/32 = 87. 5% Hong Xiao, Ph. D. Y = 2/6 = 33. 3% www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 15

Illustration of a Production Wafer Die Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 16

Illustration of a Production Wafer Test Structures Scribe Lines Dies Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 17

Clean Room • Artificial environment with low particle counts • Started in medical application for post-surgery infection prevention • Particles kills yield • IC fabrication must in a clean room Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 18

Clean Room • First used for surgery room to avoid bacteria contamination • Adopted in semiconductor industry in 1950 • Smaller device needs higher grade clean room • Less particle, more expensive to build Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 19

Clean Room Class • Class 10 is defined as less than 10 particles with diameter larger than 0. 5 mm per cubic foot. • Class 1 is defined as less than 1 such particles per cubic foot. • 0. 18 mm device require higher than Class 1 grade clean room. Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 20

Cleanroom Classes 100000 Cl # of particles / ft 3 10000 Cl 1000 as s 1 00 , 0 0, 00 00 0 as s 1 as Cl s 1 as , 0 00 s 1 00 0 Cl as s 1 100 Cl 10 1 as s 1 Cl as Cl s M -1 0. 1 Hong Xiao, Ph. D. 0. 1 1. 0 10 Particle size in micron www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 21

Definition of Airborne Particulate Cleanliness Class per Fed. Std. 209 E Class Particles/ft 3 0. 1 mm 0. 2 mm 0. 3 mm 0. 5 mm M-1 9. 8 2. 12 0. 865 0. 28 1 35 7. 5 3 1 10 350 75 30 10 100 750 300 1000 7 10000 70 Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 22

Effect of Particles on Masks Particles on Mask Stump on +PR Hong Xiao, Ph. D. Hole on -PR Film Substrate www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 23

Effect of Particle Contamination Ion Beam Dopant in PR Particle Photoresist Screen Oxide Hong Xiao, Ph. D. Partially Implanted Junctions www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 24

Cleanroom Structure Makeup Air Fans Equipment Area Class 1000 Process Tool Return Air Hong Xiao, Ph. D. HEPA Filter Class 1 Process Area Equipment Area Class 1000 Process Tool Raised Floor with Grid Panels www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm Pump, RF and etc. 25

Mini-environment • Class 1000 cleanroom, lower cost • Boardroom arrangement, no walls between process and equipment • Better than class 1 environment around wafers and the process tools • Automatic wafer transfer between process tools Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 26

Mini-Environment Cleanroom Makeup Air Fans HEPA Filter Class 1000 Return Air Hong Xiao, Ph. D. < Class 1 Process Tool Class 1000 Raised Floor with Grid Panels www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm Process Tool Pump, RF and etc. 27

Gowning Area Shelf of Gloves, Hair and Shoe Covers Gown Racks Entrance Disposal Bins Shelf of Gloves To Cleanroom Wash/Clean Stations Shelf of Gloves Storage Benches Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 28

IC Fabrication Process Module Thin film growth, dep. and/or CMP Photolithography Etching Ion Implantation PR Stripping RTA or Diffusion Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 29

Illustration of Fab Floor Equipment Areas Process Bays Corridor Service Area Sliding Doors Hong Xiao, Ph. D. Gowning Area www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 30

Mini-environment Fab Floor Process and metrology tools Service Area Emergency Exits Hong Xiao, Ph. D. Gowning Area www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 31

Wet Processes Etch, PR strip, or clean Hong Xiao, Ph. D. Rinse www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm Dry 32

Horizontal Furnace Heating Coils Wafers Quartz Tube Temperature Gas flow Center Zone Flat Zone Distance Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 33

Vertical Furnace Process Chamber Heaters Wafers Tower Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 34

Schematic of a Track Stepper Integrated System Wafer Prep Chamber Spin Coater Chill Plates Stepper Chill Plates Hong Xiao, Ph. D. Developer Hot Plates www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm Wafer Movement 35

Cluster Tool with Etch and Strip Chambers PR Strip Chamber Etch Chamber Transfer Chamber Robot Loading Station Hong Xiao, Ph. D. Unloading Station www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 36

Cluster Tool with Dielectric CVD and Etchback Chambers O 3 -TOES Chamber Ar Sputtering Chamber PECVD Chamber Transfer Chamber Robot Loading Station Hong Xiao, Ph. D. Unloading Station www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 37

Cluster Tool with PVD Chambers Al Cu Chamber Ti/Ti. N Chamber Transfer Chamber Robot Loading Station Hong Xiao, Ph. D. Unloading Station www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 38

Dry-in Dry-out CMP System Wafer Loading and Standby Polishing Pad Post-CMP Clean Polishing Heads Rinse Multi-head Polisher Dryer and Wafer Unloading Clean Station Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 39

Process Bay and Equipment Areas Sliding Doors Process Area Equipment Area Tables For PC and Metrology Tools Process Tools Service Area Wafer Loading Doors Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 40

Test Results Failed die Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 41

Chip-Bond Structure Microelectronics Devices and Circuits Chip Backside Metallization Substrate Metallization Hong Xiao, Ph. D. Chip (Silicon) Solder Melt and Condense Substrate (Metal or Ceramic) www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 42

Wire Bonding Metal Wire Bonding Pad Formation of molten metal ball Hong Xiao, Ph. D. Wire Clamp Bonding Pad Press to make contact Head retreat www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 43

Wire Bonding Pad Lead contact with pressure and heat Hong Xiao, Ph. D. Bonding Pad Lead Clamp closed with heat on to break the wire www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 44

IC Chip with Bonding Pads Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 45

IC Chip Packaging Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 46

Chip with Bumps Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 47

Flip Chip Packaging Bumps Chip Socket Hong Xiao, Ph. D. Pins www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 48

Bump Contact Bumps Chip Socket Hong Xiao, Ph. D. Pins www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 49

Heating and Bumps Melt Bumps Chip Socket Hong Xiao, Ph. D. Pins www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 50

Flip Chip Packaging Chip Socket Hong Xiao, Ph. D. Pins www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 51

Molding Cavity for Plastic Packaging Top Chase Bonding Wires Molding Cavity IC Chip Lead Frame Chip Bond Metallization Pins Bottom Chase Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 52

Ceramic Seal Bonding Wires Cap Seal Metallization IC Chip Ceramic Cap Layer 2 Lead Frame, Layer 1 Pins Chip Bond Metallization Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 53

Summary • Overall yield • Yield determines losing money or making profit • Cleanroom and cleanroom protocols • Process bays • Process, equipment, and facility areas • Die test, wafer thinning, die separation, chip packaging, and final test Hong Xiao, Ph. D. www 2. austin. cc. tx. us/Hong. Xiao/Boo k. htm 54