Chapter 14 Arithmetic Circuits Rev 1 0 05122003

Chapter 14 Arithmetic Circuits Rev. 1. 0 05/12/2003 1 EE 141 Arithmetic Circui

A Generic Digital Processor 2 EE 141 Arithmetic Circui

Building Blocks for Digital Architectures Arithmetic unit - Bit-sliced datapath (adder, multiplier, shifter, comparator, etc. ) Memory - RAM, ROM, Buffers, Shift registers Control - Finite state machine (PLA, random logic. ) - Counters Interconnect - Switches - Arbiters - Bus 3 EE 141 Arithmetic Circui

An Intel Microprocessor Itanium has 6 integer execution units like this 4 EE 141 Arithmetic Circui

Bit-Sliced Design 5 EE 141 Arithmetic Circui

Bit-Sliced Datapath 6 EE 141 Arithmetic Circui

Itanium Integer Datapath EE 141 Fetzer, Orton, ISSCC’ 02 7 Arithmetic Circui

Adders 8 EE 141 Arithmetic Circui

Full-Adder 9 EE 141 Arithmetic Circui

The Binary Adder 10 EE 141 Arithmetic Circui

Express Sum and Carry as a function of P, G, D Define 3 new variable which ONLY depend on A, B Generate (G) = AB Propagate (P) = A Å B Delete = A B Can also derive expressions for S and Co based on D and P Note that we will be sometimes using an alternate definition for Propagate (P) = A + B 11 EE 141 Arithmetic Circui

The Ripple-Carry Adder A 0 Ci, 0 B 0 FA S 0 A 1 Co, 0 (= Ci, 1) B 1 FA A 2 Co, 1 S 1 B 2 FA A 3 Co, 2 S 2 B 3 FA Co, 3 S 3 Worst case delay linear with the number of bits td = O(N) tadder = (N-1)tcarry + tsum Goal: Make the fastest possible carry path circuit 12 EE 141 Arithmetic Circui

Complimentary Static CMOS Full Adder 28 Transistors 13 EE 141 Arithmetic Circui

Inversion Property 14 EE 141 Arithmetic Circui

Minimize Critical Path by Reducing Inverting Stages Exploit Inversion Property 15 EE 141 Arithmetic Circui

A Better Structure: The Mirror Adder 16 EE 141 Arithmetic Circui

Mirror Adder Stick Diagram 17 EE 141 Arithmetic Circui

The Mirror Adder • The NMOS and PMOS chains are completely symmetrical. A maximum of two series transistors can be observed in the carrygeneration circuitry. • When laying out the cell, the most critical issue is the minimization of the capacitance at node Co. The reduction of the diffusion capacitances is particularly important. • The capacitance at node Co is composed of four diffusion capacitances, two internal gate capacitances, and six gate capacitances in the connecting adder cell. • The transistors connected to Ci are placed closest to the output. • Only the transistors in the carry stage have to be optimized for optimal speed. All transistors in the sum stage can be minimal size. 18 EE 141 Arithmetic Circui

Transmission-Gate Full Adder 19 EE 141 Arithmetic Circui

Manchester Carry Chain 20 EE 141 Arithmetic Circui

Manchester Carry Chain 21 EE 141 Arithmetic Circui

Manchester Carry Chain Stick Diagram 22 EE 141 Arithmetic Circui

Carry-Bypass Adder Also called Carry-Skip 23 EE 141 Arithmetic Circui

Carry-Bypass Adder (cont. ) tadder = tsetup + Mtcarry + (N/M-1)tbypass + (M-1)tcarry + tsum 24 EE 141 Arithmetic Circui

Carry Ripple versus Carry Bypass 25 EE 141 Arithmetic Circui

Carry-Select Adder 26 EE 141 Arithmetic Circui

Carry Select Adder: Critical Path 27 EE 141 Arithmetic Circui

Linear Carry Select 28 EE 141 Arithmetic Circui

Square Root Carry Select 29 EE 141 Arithmetic Circui

Adder Delays - Comparison 30 EE 141 Arithmetic Circui

Look-ahead Adder - Basic Idea 31 EE 141 Arithmetic Circui

Look-Ahead: Topology Expanding Lookahead equations: All the way: 32 EE 141 Arithmetic Circui

Logarithmic Look-Ahead Adder 33 EE 141 Arithmetic Circui

Carry Lookahead Trees Can continue building the tree hierarchically. 34 EE 141 Arithmetic Circui

Tree Adders 16 -bit radix-2 Kogge-Stone tree 35 EE 141 Arithmetic Circui

Tree Adders 16 -bit radix-4 Kogge-Stone Tree 36 EE 141 Arithmetic Circui

Sparse Trees 16 -bit radix-2 sparse tree with sparseness of 2 37 EE 141 Arithmetic Circui

Tree Adders Brent-Kung Tree 38 EE 141 Arithmetic Circui

Example: Domino Adder Propagate Generate 39 EE 141 Arithmetic Circui

Example: Domino Adder Propagate Generate 40 EE 141 Arithmetic Circui

Example: Domino Sum 41 EE 141 Arithmetic Circui

Multiplier s 42 EE 141 Arithmetic Circui

Binary Multiplication 43 EE 141 Arithmetic Circui

Binary Multiplication 44 EE 141 Arithmetic Circui

Array Multiplier 45 EE 141 Arithmetic Circui

Mx. N Array Multiplier — Critical Path 1 & 2 46 EE 141 Arithmetic Circui

Carry-Save Multiplier 47 EE 141 Arithmetic Circui

Multiplier Floorplan 48 EE 141 Arithmetic Circui

Wallace-Tree Multiplier 49 EE 141 Arithmetic Circui

Wallace-Tree Multiplier 50 EE 141 Arithmetic Circui

Wallace-Tree Multiplier 51 EE 141 Arithmetic Circui

Multipliers —Summary • Identify Critical Paths • Other Possible techniques: • Data Encoding (Booth) • Logarithmic v. s. Linear (Wallace Tree Multiplier) • Pipelining 52 EE 141 Arithmetic Circui

Shifters 53 EE 141 Arithmetic Circui

The Binary Shifter 54 EE 141 Arithmetic Circui

The Barrel Shifter Area Dominated by Wiring 55 EE 141 Arithmetic Circui

4 x 4 barrel shifter Widthbarrel ~ 2 pm M 56 EE 141 Arithmetic Circui

Logarithmic Shifter 57 EE 141 Arithmetic Circui

0 -7 bit Logarithmic Shifter A A 3 Out 3 2 Out 2 1 Out 1 0 Out 0 58 EE 141 Arithmetic Circui

Summary q Datapath designs are fundamentals for highspeed DSP, Multimedia, Communication digital VLSI designs. q Most adders, multipliers, division circuits are now available in Synopsys Designware under different area/speed constraint. q For details, check “Advanced VLSI” notes, or “Computer Arithmetic” 59 EE 141 Arithmetic Circui