Chapter 02 Design Digital Circuits with Xilinx ISE
- Slides: 40
Chapter 02 Design Digital Circuits with Xilinx ISE 1
Create new project v Select File New Project and type “Top” under the Project Name. 4
Create new project (cont. ) v Click Finish. 5
Add Schematic v Select Project New Source and select Schematic and type “Top_sch” under the File Name. 7
Add Schematic (cont. ) v Click Finish. 8
Add Symbol Add wire Add I/O Maker Add Net Name Add Bus Tap Rename Bus 10
Full Adder 12
Full Adder (cont. ) v Select Symbols and then select symbol that we need AND gate, XOR gate and OR gate. 13
Full Adder (cont. ) 14
Full Adder (cont. ) v Select Add Wire. 15
Full Adder (cont. ) v Select Add Net Name and type your Bus name under the Selected bus name. 16
Full Adder (cont. ) v After Add Net Name, Select Add I/O Maker. 17
Full Adder (cont. ) v Select Tool Check schematic and no error and Save. 18
Add Test Bench Waveform v Select Add New Source and select Test Bench Waveform and type “Top_tes” under the File Name. 20
Add Test Bench Waveform (cont. ) v Select “Design Type” and “Time Scale”. 21
Add Test Bench Waveform (cont. ) 22
Add Test Bench Waveform (cont. ) 23
Add Test Bench Waveform (cont. ) v Click Save and select “View Behavioral Test Fixture” and Run. 24
Add Test Bench Waveform (cont. ) v You can see a Test Bench. 25
Simulation v Select “Simulate Behavioral Model” and Run. 26
Simulation (cont. ) v You can see “Error Loading”. 27
Simulation (cont. ) v Select View Source. 28
Simulation (cont. ) v Select File Open. 29
Simulation (cont. ) v Select “src” file. 30
Simulation (cont. ) v Select AND 2 gate. 31
Simulation (cont. ) v Select Tools Compile. 32
Simulation (cont. ) v Click “Compile” and Click “Done”. 33
Simulation (cont. ) v Similarly, we need repeat these flow to select “OR 3” gate and “XOR 2” gate. 34
Simulation (cont. ) v Similarly, we need repeat these flow to select “OR 3” gate and “XOR 2” gate. 35
Simulation (cont. ) v Double-click “Top_test” and Right Click “Top_test: Top_test” to select Add to Wave. 36
Simulation (cont. ) v Click “Run All” or “Continue Run”. 37
Simulation Result 38
Simulation Result (cont. ) 39
Simulation Result (cont. ) 40