Central Processing Unit 1 Lecture 22 Overview Introduction

Central Processing Unit 1 Lecture 22 Overview Ø Introduction Ø General Register Organization Ø Stack Organization Ø Instruction Formats Ø Addressing Modes Ø Data Transfer and Manipulation Ø Program Control and Program Interrupt Ø Reduced Instruction Set Computer CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Central Processing Unit 2 Lecture 22 Major Components of CPU • Storage Components Registers Flags • Execution (Processing) Components Arithmetic Logic Unit(ALU) Arithmetic calculations, Logical computations, Shifts/Rotates • Transfer Components Bus • Control Components Control Unit CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Central Processing Unit 3 Lecture 22 Register ØIn Basic Computer, there is only one general purpose register, the Accumulator (AC) ØIn modern CPUs, there are many general purpose registers ØIt is advantageous to have many registers • Transfer between registers within the processor are relatively fast • Going “off the processor” to access memory is much slower Important: How many registers will be the best ? CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Central Processing Unit 4 Lecture 22 General Register Organization Input Clock R 1 R 2 R 3 R 4 R 5 R 6 R 7 Load (7 lines) SELA { 3 x 8 decoder SELD MUX A bus OPR } SELB B bus ALU Output CSE 211, Computer Organization and Architecture Harjeet Kaur, CSE/IT

Central Processing Unit 5 Lecture 22 Operation of Control. Unit The control unit Directs the information flow through ALU by - Selecting various Components in the system - Selecting the Function of ALU Example: R 1 R 2 + R 3 [1] MUX A selector (SELA): BUS A R 2 [2] MUX B selector (SELB): BUS B R 3 [3] ALU operation selector (OPR): ALU to ADD [4] Decoder destination selector (SELD): R 1 Out Bus Control Word 3 SELA 3 SELB 3 SELD Encoding of register selection fields CSE 211, Computer Organization and Architecture 5 OPR Binary Code 000 001 010 011 100 101 110 111 SELA Input R 1 R 2 R 3 R 4 R 5 R 6 R 7 SELB Input R 1 R 2 R 3 R 4 R 5 R 6 R 7 SELD None R 1 R 2 R 3 R 4 R 5 R 6 R 7 Harjeet Kaur, CSE/IT

Central Processing Unit 6 Lecture 22 ALU Control Encoding of ALU operations OPR Select 000001 000101 00110 01000 01010 01100 01110 10000 11000 Operation Transfer A Increment A ADD A + B Subtract A - B Decrement A AND A and B OR A and B XOR A and B Complement A Shift right A Shift left A Symbol TSFA INCA ADD SUB DECA AND OR XOR COMA SHRA SHLA Examples of ALU Microoperations Symbolic Designation Microoperation SELA SELB SELD R 1 R 2 R 3 R 2 R 3 R 1 SUB 010 011 00101 R 4 R 5 R 4 OR 100 101 100 01010 R 6 R 1 R 2 Input R 4 R 5 R 6 R 7 None R 4 R 5 INCA TSFA SHLA XOR 110 00001 000 111 00000 010 000 00000 100 11000 101 101 01100 R 6 + 1 R 7 R 1 Output R 2 Output Input R 4 shl R 4 R 5 0 CSE 211, Computer Organization and Architecture OPR Control Word Harjeet Kaur, CSE/IT