C 2 Part 4 VLSI CAD Tools Problems

C 2 Part 4: VLSI CAD Tools Problems and Algorithms Marcelo Johann EAMTA 2006

Outline THIRD PART • • • Layout Compaction Logic Synthesis, BDDs Technology Mapping Simmulation vs Formal Verification Voltage Drop by Random Walks FOURTH PART • High-Level Synthesis • CDFG, Allocation, Scheduling, Generation EAMTA 2006 - Marcelo Johann - C 21. 2

Function representations Truth Tables Lists the output for every input combination • For n variables, 2 n lines Formulas F=x 1. x 2. ~x 5 + ~x 3(x 2. x 4. x 5 + ~x 2) + x 2. x 3 • Not Canonical in general, canonical is large BDDs A graph that packs a truth table • Average sized, powerful representation EAMTA 2006 - Marcelo Johann - C 21. 3

BDDs Source: Wikipedia EAMTA 2006 - Marcelo Johann - C 21. 4

BDD - good ordering BDD graph for the Boolean formula x 1 * x 2 + x 3 * x 4 + x 5 * x 6 + x 7 * x 8 using a good variable ordering EAMTA 2006 - Marcelo Johann - C 21. 5

BDD - bad ordering BDD graph for the Boolean formula x 1 * x 2 + x 3 * x 4 + x 5 * x 6 + x 7 * x 8 using a bad variable ordering EAMTA 2006 - Marcelo Johann - C 21. 6

Random Walks EAMTA 2006 - Marcelo Johann - C 21. 7

Random Walks EAMTA 2006 - Marcelo Johann - C 21. 8

IR Drop EAMTA 2006 - Marcelo Johann - C 21. 9

Random Walk EAMTA 2006 - Marcelo Johann - C 21. 10

The Algorithm Initialize • Compute conductance, px, i , mx For each node in the circuit Loop n times according to accuracy Loop until reaching Supply – Add this node’s cost – Random select the next move Make this node a new supply Print the result EAMTA 2006 - Marcelo Johann - C 21. 11

Accuracy 15876 VDD nodes 15625 GND nodes 1. 2 V Linux 2. 8 GHz CPU Delta controls error such that 99% of the nodes have less then Error Margin EAMTA 2006 - Marcelo Johann - C 21. 12

Jump to… VLSI System Design Part V : High-Level Synthesis Lecturer : Tsuyoshi Isshiki VLSI Design and Education Center, The University of Tokyo Dept. Communication and Integrated Systems, Tokyo Institute of Technology isshiki@vlsi. ss. titech. ac. jp http: //www. vlsi. ss. titech. ac. jp/~isshiki/VLSISystem. Design/top. html EAMTA 2006 - Marcelo Johann - C 21. 13

C 2: VLSI CAD Tools Problems and Algorithms ! u o y k n a Th Marcelo Johann johann@inf. ufrgs. br www. inf. ufrgs. br/~johann EAMTA 2006