BuiltIn SelfTestSelfDiagnosis for RAMs JinFu Li Advanced Reliable
Built-In Self-Test/Self-Diagnosis for RAMs Jin-Fu Li Advanced Reliable Systems (ARES) Lab. Department of Electrical Engineering National Central University Jhongli, Taiwan
Outline o Introduction o Fault Models and Test Algorithms n Fault models n Test Algorithms o Memory BIST/BISD Design n BIST Design n BISD Design o Memory Diagnosis n Fault Diagnosis n Defect Diagnosis Jin-Fu Li ARES Lab. EE, NCU 2
Introduction o Modern system-on-chip (SOC) designs typically consist of hundreds of memories n Memories usually dominate the chip area o Furthermore, memories are designed with the aggressive design rules such that they are prone to defects o Thus the memory yield heavily impacts the SOC yield n Increasing memory yield can significantly increase the SOC yield o Yield-enhancement techniques for memories n Diagnosis & repair Jin-Fu Li ARES Lab. EE, NCU 3
SOC Yield of an SOC o o Improve the yields of memories can drastically increase the yields of SOCs o For example, Ultra. Sparc chip yield Source: R. Rajsuman, IEEE D&T, 2001 Jin-Fu Li ARES Lab. EE, NCU 4
Yield Learning Curve Yield Diagnosis/repair Repair Mature phase Early phase Intermediate phase Jin-Fu Li ARES Lab. EE, NCU Time 5
Testing and Repair of RAMs in SOCs 16 -core SPARC (Oracle) Niagara 2 (Sun) DFT features: 1. Scan test + test compression 2. Programmable memory built-in self-test (MBIST) + repair 3. Ser. Des internal and external look-back tests DFT features: 1. 32 Scans + ATPG 2. BIST for arrays 3. …. Jin-Fu Li ARES Lab. EE, NCU POWER 6 (IBM) DFT features: 1. Logic BIST 2. BIST for arrays 3. BISR for arrays 4. … 6
Fault Models and Test Algorithms
Conclusions o Undoubtedly, 3 D RAM will be one pioneer product using 3 D integration technology o Some differences exist between a 2 D RAM and a 3 D RAM with TSVs o Those differences incur some challenges on the testing and repair of 3 D RAMs o Effective testing and repair techniques thus are imperative for the production of 3 D RAMs o Due to the uncertainty of a 3 D RAM n DFT/DFY/DFR techniques with the feature of adaptability is one main trend Jin-Fu Li ARES Lab. EE, NCU 8
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