Bit grouping for IEEE 802 16 m CTC

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Bit grouping for IEEE 802. 16 m CTC Document Number: IEEE C 802. 16

Bit grouping for IEEE 802. 16 m CTC Document Number: IEEE C 802. 16 m-09/0670 Date Submitted: 2009 -03 -09 Source: Seunghyun Kang, Sukwoo Lee LG Electronics Re: Email: {sh_kang, sugoo} @lge. com IEEE 802. 16 m-09/0012, “Call for Contributions on Project 802. 16 m Amendment Working Document (AWD) Content”. Target topic: “Channel Coding” Venue: IEEE Session #60, Vancouver, BC, Canada Purpose: To be discussed and adopted in the Amendment Working Document Notice: This document does not represent the agreed views of the IEEE 802. 16 Working Group or any of its subgroups. It represents only the views of the participants listed in the “Source(s)” field above. It is offered as a basis for discussion. It is not binding on the contributor(s), who reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor grants a free, irrevocable license to the IEEE to incorporate material contained in this contribution, and any modifications thereof, in the creation of an IEEE Standards publication; to copyright in the IEEE’s name any IEEE Standards publication even though it may include portions of this contribution; and at the IEEE’s sole discretion to permit others to reproduce in whole or in part the resulting IEEE Standards publication. The contributor also acknowledges and accepts that this contribution may be made public by IEEE 802. 16. Patent Policy: The contributor is familiar with the IEEE-SA Patent Policy and Procedures: <http: //standards. ieee. org/guides/bylaws/sect 6 -7. html#6> and <http: //standards. ieee. org/guides/opman/sect 6. html#6. 3>. Further information located at <http: //standards. ieee. org/board/pat-material. html> and <http: //standards. ieee. org/board/pat >.

CTC Bit grouping method in IEEE 802. 16 e n 16 e bit grouping

CTC Bit grouping method in IEEE 802. 16 e n 16 e bit grouping procedure ü ü ü All of the encoded bits are demultiplexed into six subblocks denoted A, B, Y 1, Y 2, W 1, and W 2. The six subblocks are interleaved separately by using the same subblock interleaver. The output sequence of the bit grouping consists of the interleaved A and B subblock sequence, followed by a bit-by-bit multiplexed sequence of the interleaved Y 1 and Y 2 subblock sequences, followed by a bit-by-bit multiplexed sequence of the interleaved W 1 and W 2 subblock sequences

CTC Bit grouping method in IEEE 802. 16 e n Block diagram

CTC Bit grouping method in IEEE 802. 16 e n Block diagram

CTC Bit grouping method in IEEE 802. 16 e n Unevenly distributed bit reliabilities

CTC Bit grouping method in IEEE 802. 16 e n Unevenly distributed bit reliabilities ü ü In the case of using high order modulation(16 QAM or 64 QAM), the codeword sequence is mapped onto 2 or 3 bit reliabilities depending on the modulation order. On the decoder point of view, the legacy bit grouping method unevenly distributes the bit reliabilities of the systematic bits along whole decoding trellis transitions.

Proposed Bit grouping method for IEEE 802. 16 m CTC n Simple modification of

Proposed Bit grouping method for IEEE 802. 16 m CTC n Simple modification of 16 e bit grouping method ü The interleaved sequence of the sub block B is circularly shifted to the left once. ü The output sequence of the proposed bit grouping consists of the interleaved A and BShift subblock sequence, followed by a bit-by-bit multiplexed sequence of the interleaved Y 1 and Y 2 subblock sequences, followed by a bit-by-bit multiplexed sequence of the interleaved W 1 and W 2 subblock sequences.

Proposed Bit grouping method for 802. 16 m CTC n Block diagram

Proposed Bit grouping method for 802. 16 m CTC n Block diagram

Proposed Bit grouping method for 802. 16 m CTC n Bit reliability comparison on

Proposed Bit grouping method for 802. 16 m CTC n Bit reliability comparison on the decoder point of view ü Example with NEP=48 and 16 QAM n n ü For each subblock, the following table shows the bit reliability values of 24 -bit subblock sequence. ‘ 0’ represents low bit reliability and ‘ 1’ represents low bit reliability A’ and B’ means the bit reliability values after CTC inner interleaving ‘Sum’ shows the sum of the bit reliability values for each decoding trellis transition. As shown in the table, the proposed bit grouping method evenly distributes the bit reliabilities along whole decoding trellis transitions Bit Reliability Subblocks DEC #1 DEC #2 16 e Bit grouping Proposed Bit grouping A 000011111111000000001111 B 00001111000011110000 Sum 0000222200002222 111111111111 A’ 001110100101011010001101 100100001111110000100111 B’ 0011101001010110100011011110000001111011000 Sum 002220200202022020002202 111111111111

Simulation assumption n MCS table MCS index Modulation Code rate 0 QPSK 31/256 1

Simulation assumption n MCS table MCS index Modulation Code rate 0 QPSK 31/256 1 QPSK 48/256 2 QPSK 71/256 3 QPSK 101/256 4 QPSK 135/256 5 QPSK 171/256 6 16 QAM 102/256 7 16 QAM 128/256 8 16 QAM 155/256 9 16 QAM 184/256 10 64 QAM 135/256 11 64 QAM 157/256 12 64 QAM 181/256 13 64 QAM 205/256 14 64 QAM 225/256 15 64 QAM 237/256

Simulation assumption FEC block sizes NEP 960, 1000 Codeword size Bit grouping methods Decoding

Simulation assumption FEC block sizes NEP 960, 1000 Codeword size Bit grouping methods Decoding algorithm MCS Channel Option-1 16 e Bit grouping method [1] Option-2 Bit grouping method from Huawei, Samsung and Media. Tek joint proposal [2] Option-3 Proposed bit grouping method Max-Log-MAP decoding with - 8 decoding iterations - Scaling factor: 0. 75 10 MCS levels have been used. - MCS indices of 6~15 in the MCS table AWGN

Simulation result with NEP = 960

Simulation result with NEP = 960

Simulation result with NEP = 960

Simulation result with NEP = 960

Simulation result with NEP = 960

Simulation result with NEP = 960

Simulation result with NEP = 1000

Simulation result with NEP = 1000

Simulation result with NEP = 1000

Simulation result with NEP = 1000

Simulation result with NEP = 1000

Simulation result with NEP = 1000

Simulation result with NEP = 1920

Simulation result with NEP = 1920

Simulation result with NEP = 1920

Simulation result with NEP = 1920

Simulation result with NEP = 1920

Simulation result with NEP = 1920

Conclusion n Comparing to Option-1 IEEE 802. 16 e Bit grouping method, Performance Complexity

Conclusion n Comparing to Option-1 IEEE 802. 16 e Bit grouping method, Performance Complexity (Additional Blocks) n Option-2 [2] Option-3: Proposed method Case NEP=960, -Better than Option-1 Case NEP=960, - Better than Option-1 - Almost same as Option-2 Case NEP=1000, - Almost same as Option-1 Case NEP=1920, - Better than Option-1 - Almost same as Option-2 C-symbol permutation blocks for each subblock Depending on modulation order, different permutation patterns are used. Only one circular shift block for the interleaved B subblock sequence According to above comparisons, we propose Option-3 bit grouping method for IEEE 802. 16 m CTC.

Reference [1] IEEE P 802. 16 Rev 2/D 9, “Draft IEEE Standard for Local

Reference [1] IEEE P 802. 16 Rev 2/D 9, “Draft IEEE Standard for Local and Metropolitan Area Networks: Air Interface for Broadband Wireless Access, ” Jan. 2009. [2] IEEE C 802. 16 m 09/0665, “Proposed Text of CTC Bit grouping for IEEE 802. 16 m Amendment” Mar. 2009

Proposed Text -------------------- Text Start -------------------15. 13. 1. x. x Bit grouping After subblock

Proposed Text -------------------- Text Start -------------------15. 13. 1. x. x Bit grouping After subblock interleaving, the interleaved sequence of the sub block B is circularly shifted to the left once as follows. The output sequence of bit grouping shall consist of the interleaved A subblock sequence and BShift subblock sequence followed by the bit-by-bit multiplexed sequence of Y 1 and Y 2 sub blocks, followed by the bit-by-bit multiplexed sequence of W 1 and W 2 subblock. The bit-by-bit multiplexed sequence of interleaved Y 1 and Y 2 subblock sequences shall consist of the first output bit from the Y 1 subblock interleaver, the first output bit from the Y 2 subblock interleaver, the second output bit from the Y 1 subblock interleaver, the second output bit from the Y 2 subblock interleaver, etc, The bit-bybit multiplexed sequence of interleaved W 1 and W 2 subblock sequences shall consist of the first output bit from the W 1 subblock interleaver, the first output bit from the W 2 subblock interleaver, the second output bit from the W 1 subblock interleaver, the second output bit from the W 2 subblock interleaver, etc. Figure xxx shows the interleaving and the bit grouping scheme.

Proposed Text Figure xxx. Block diagram of the interleaving and bit grouping scheme ---------------------

Proposed Text Figure xxx. Block diagram of the interleaving and bit grouping scheme --------------------- Text End---------------------